diff --git a/src/target/mips32.c b/src/target/mips32.c
index 1aaa6d6d826050f7da0e7d1fb59e5384fa060c70..55c197b77c6d93a25e63ee8379e6d1293bc221a7 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -300,6 +300,9 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s
mips32->read_core_reg = mips32_read_core_reg;
mips32->write_core_reg = mips32_write_core_reg;
+ mips32->ejtag_info.scan_delay = 2000000; /* Initial default value */
+ mips32->ejtag_info.mode = 0; /* Initial default value */
+
return ERROR_OK;
}
@@ -779,6 +782,29 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
return ERROR_OK;
}
+COMMAND_HANDLER(mips32_handle_scan_delay_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct mips32_common *mips32 = target_to_mips32(target);
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+
+ if (CMD_ARGC == 1)
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], ejtag_info->scan_delay);
+ else if (CMD_ARGC > 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+ if (ejtag_info->scan_delay >= 2000000) {
+ ejtag_info->mode = 0;
+ command_print(CMD_CTX, "running in legacy mode");
+ } else {
+ ejtag_info->mode = 1;
+ command_print(CMD_CTX, "running in fast queued mode");
+ }
+
+ return ERROR_OK;
+}
+
static const struct command_registration mips32_exec_command_handlers[] = {
{
.name = "cp0",
@@ -786,6 +812,13 @@ static const struct command_registration mips32_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.usage = "regnum select [value]",
.help = "display/modify cp0 register",
+ },
+ {
+ .name = "scan_delay",
+ .handler = mips32_handle_scan_delay_command,
+ .mode = COMMAND_ANY,
+ .help = "display/set scan delay in nano seconds",
+ .usage = "[value]",
},
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index 8f208f5fda54fb19aaff6d030b5f988ed705e8fe..04d909e24e581a6c10cc3d0097d60e073e8ad976 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -51,6 +51,14 @@
#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
/*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
+struct pracc_queue_info {
+ int retval;
+ const int max_code;
+ int code_count;
+ int store_count;
+ uint32_t *pracc_list; /* Code and store addresses */
+};
+
int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
uint32_t addr, int size, int count, void *buf);
int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index a72731efb872e8d532c06256a32de95efaa4488a..794f92f819881acb6f82d73468177d8c86af26e9 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -99,6 +99,29 @@ static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impco
return ERROR_OK;
}
+void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf)
+{
+ assert(ejtag_info->tap != NULL);
+ struct jtag_tap *tap = ejtag_info->tap;
+
+ struct scan_field field;
+ uint8_t out_scan[12];
+
+ /* processor access "all" register 96 bit */
+ field.num_bits = 96;
+
+ field.out_value = out_scan;
+ buf_set_u32(out_scan, 0, 32, ctrl);
+ buf_set_u32(out_scan + 4, 0, 32, data);
+ buf_set_u32(out_scan + 8, 0, 32, 0);
+
+ field.in_value = in_scan_buf;
+
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
+
+ keep_alive();
+}
+
int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
{
struct jtag_tap *tap;
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 1e9fd18079834fdcfd448fc034bbb830546c209d..32f016035f4335c016b45096312df16bd59f4dfd 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -130,6 +130,8 @@ struct mips_ejtag {
int fast_access_save;
uint32_t reg8;
uint32_t reg9;
+ unsigned scan_delay;
+ int mode;
};
void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
@@ -137,6 +139,8 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
+void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info,
+ uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf);
void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data);
int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data);
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index a055696b04ec9fa2003e7d1e7a113f284e7c4510..e91bd57b6d610a9ebbccb5d2281f55d6952afb2f 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -1186,7 +1186,6 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
if (CMD_ARGC == 2) {
uint32_t value;
-
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
@@ -1273,6 +1272,29 @@ COMMAND_HANDLER(mips_m4k_handle_smp_gdb_command)
return ERROR_OK;
}
+COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct mips_m4k_common *mips_m4k = target_to_m4k(target);
+ struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
+
+ if (CMD_ARGC == 1)
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], ejtag_info->scan_delay);
+ else if (CMD_ARGC > 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+ if (ejtag_info->scan_delay >= 20000000) {
+ ejtag_info->mode = 0;
+ command_print(CMD_CTX, "running in legacy mode");
+ } else {
+ ejtag_info->mode = 1;
+ command_print(CMD_CTX, "running in fast queued mode");
+ }
+
+ return ERROR_OK;
+}
+
static const struct command_registration mips_m4k_exec_command_handlers[] = {
{
.name = "cp0",
@@ -1302,6 +1324,13 @@ static const struct command_registration mips_m4k_exec_command_handlers[] = {
.help = "display/fix current core played to gdb",
.usage = "",
},
+ {
+ .name = "scan_delay",
+ .handler = mips_m4k_handle_scan_delay_command,
+ .mode = COMMAND_ANY,
+ .help = "display/set scan delay in nano seconds",
+ .usage = "[value]",
+ },
COMMAND_REGISTRATION_DONE
};