diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..a6d2fcca2e6f996eb2dcc94589f48087482d0a3d
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,19 @@
+jake/
+**.elf
+**.hex
+**.bin
+**.lss
+**.map
+**.srec
+**.o
+**.d
+**.DS_Store
+**.b#*
+**.s#*
+
+**/ASF/
+
+js/node_modules/
+
+sim/js_code.txt
+sim/TinyNets/nbproject/
\ No newline at end of file
diff --git a/capacitive.md b/capacitive.md
index 5a6b602668a9b960c18d4019c272afccd3bb6fce..0d9fa57f14a94c0e80ca702533c251a9b66c324e 100644
--- a/capacitive.md
+++ b/capacitive.md
@@ -16,9 +16,15 @@ In short, these solutions seem cool, but complicated, and I need to take some mo
  - adc resolution -> bar width / spacing
  - grounding, stack setup, tx pads, rx pad(s)?
 
+## Understanding the Phenomenon
+
+It's good to try to get a grounding on what's really going on. To get the basics in order, I go [here](http://hyperphysics.phy-astr.gsu.edu/hbase/electric/pplate.html). 
+
+Capacitance is $C = \frac{k * e * A}{d}$ where $k$ is the relative permittivity of the material between the plates, $e$ is a constant making $k * e = 1$ in air, $A$ is the area of the plates and $d$ is the separation of those plates. 
+
 Some quick thoughts 
- - do static tx / rx pads. reference is metallic thing that moves between them, changing the permeability of space between them
-  - bc capacitance is C = \frac{k * e * A}{d} where E is constant, A is area, and K is relative permeability (k ~= 1 for air)
+ - do static tx / rx pads. reference is metallic thing that moves between them, changing the permeattivity of space between them
+  - bc capacitance is C = \frac{k * e * A}{d} where E is constant, A is area, and K is relative permeattivity (k ~= 1 for air)
   - 'metallic thing' can be double-sided pcb w/ sawtooth or sine pattern to read
  - can do spreadsheet maths for tx / rx areas, see what total capacitance range will be (1pf -> 15pf?)
  - can figure apparent rise-time calculator, probably?
diff --git a/mkencoder-capacitive/eagle.epf b/mkencoder-capacitive/eagle.epf
index df301768dae5eda4358bf95429c95d13fbd4625f..ce69fc4f28a16385dde9d7ec82b78397a908c8f3 100644
--- a/mkencoder-capacitive/eagle.epf
+++ b/mkencoder-capacitive/eagle.epf
@@ -353,10 +353,10 @@ UsedLibrary="D:/Dropbox (Personal)/CBA/doc/libraries/eagle/fab.lbr"
 
 [Win_1]
 Type="Control Panel"
-Loc="0 0 3839 2065"
+Loc="0 0 1919 1016"
 State=1
 Number=0
 
 [Desktop]
-Screen="3840 2160"
+Screen="1920 2160"
 Window="Win_1"
diff --git a/mkencoder-capacitive/mkencoder-capacitive.sch b/mkencoder-capacitive/mkencoder-capacitive.sch
new file mode 100644
index 0000000000000000000000000000000000000000..189c00b2882a4ed44606810075bded7d629b8192
--- /dev/null
+++ b/mkencoder-capacitive/mkencoder-capacitive.sch
@@ -0,0 +1,48 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="8.3.2">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
+<layers>
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+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+</layers>
+<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R">
+<libraries>
+</libraries>
+<attributes>
+</attributes>
+<variantdefs>
+</variantdefs>
+<classes>
+<class number="0" name="default" width="0" drill="0">
+</class>
+</classes>
+<parts>
+</parts>
+<sheets>
+<sheet>
+<plain>
+</plain>
+<instances>
+</instances>
+<busses>
+</busses>
+<nets>
+</nets>
+</sheet>
+</sheets>
+</schematic>
+</drawing>
+</eagle>
diff --git a/mkencoder-capacitive/untitled.s## b/mkencoder-capacitive/untitled.s##
deleted file mode 100644
index 751d582d48d3873a2b8ccc89d87ef727d7c444d4..0000000000000000000000000000000000000000
--- a/mkencoder-capacitive/untitled.s##
+++ /dev/null
@@ -1,588 +0,0 @@
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-<wire x1="22.86" y1="-40.64" x2="-20.32" y2="-40.64" width="0.254" layer="94"/>
-<wire x1="-20.32" y1="-40.64" x2="-20.32" y2="40.64" width="0.254" layer="94"/>
-<text x="-20.32" y="-43.18" size="1.778" layer="96">&gt;VALUE</text>
-<text x="-20.32" y="41.91" size="1.778" layer="95">&gt;NAME</text>
-<pin name="PE0/SDA" x="-25.4" y="-38.1" length="middle"/>
-<pin name="PE1/XCK0/SCL" x="-25.4" y="-35.56" length="middle"/>
-<pin name="PE2/RXD0" x="-25.4" y="-33.02" length="middle"/>
-<pin name="PE3/TXD0" x="-25.4" y="-30.48" length="middle"/>
-<pin name="PD7/TXD1/SCK/DP" x="27.94" y="-20.32" length="middle" rot="R180"/>
-<pin name="PD6/RXD1/MISO/DM" x="27.94" y="-22.86" length="middle" rot="R180"/>
-<pin name="PD5/XCK1/MOSI" x="27.94" y="-25.4" length="middle" rot="R180"/>
-<pin name="PD4/CS" x="27.94" y="-27.94" length="middle" rot="R180"/>
-<pin name="PD3/TXD0" x="27.94" y="-30.48" length="middle" rot="R180"/>
-<pin name="PD2/RXD0" x="27.94" y="-33.02" length="middle" rot="R180"/>
-<pin name="PD1/XCK0" x="27.94" y="-35.56" length="middle" rot="R180"/>
-<pin name="PD0" x="27.94" y="-38.1" length="middle" rot="R180"/>
-<pin name="PC7/TXD1/SCK" x="27.94" y="2.54" length="middle" rot="R180"/>
-<pin name="PC6/RXD1/MISO" x="27.94" y="0" length="middle" rot="R180"/>
-<pin name="PC5/XCK1/MOSI" x="27.94" y="-2.54" length="middle" rot="R180"/>
-<pin name="PC4/CS" x="27.94" y="-5.08" length="middle" rot="R180"/>
-<pin name="PC3/TXD0" x="27.94" y="-7.62" length="middle" rot="R180"/>
-<pin name="PC2/RXD0" x="27.94" y="-10.16" length="middle" rot="R180"/>
-<pin name="PC1/SCL/XCK0" x="27.94" y="-12.7" length="middle" rot="R180"/>
-<pin name="PC0/SDA" x="27.94" y="-15.24" length="middle" rot="R180"/>
-<pin name="PB3" x="27.94" y="15.24" length="middle" rot="R180"/>
-<pin name="PB2" x="27.94" y="12.7" length="middle" rot="R180"/>
-<pin name="PB1" x="27.94" y="10.16" length="middle" rot="R180"/>
-<pin name="PB0" x="27.94" y="7.62" length="middle" rot="R180"/>
-<pin name="PA6" x="27.94" y="35.56" length="middle" rot="R180"/>
-<pin name="PA7" x="27.94" y="38.1" length="middle" rot="R180"/>
-<pin name="PA5" x="27.94" y="33.02" length="middle" rot="R180"/>
-<pin name="PA4" x="27.94" y="30.48" length="middle" rot="R180"/>
-<pin name="PA3" x="27.94" y="27.94" length="middle" rot="R180"/>
-<pin name="PA2" x="27.94" y="25.4" length="middle" rot="R180"/>
-<pin name="PA1" x="27.94" y="22.86" length="middle" rot="R180"/>
-<pin name="PA0" x="27.94" y="20.32" length="middle" rot="R180"/>
-<pin name="AVCC" x="-25.4" y="22.86" length="middle" direction="pwr"/>
-<pin name="GND3" x="-25.4" y="7.62" visible="pad" length="middle" direction="pwr"/>
-<pin name="VCC2" x="-25.4" y="17.78" visible="pad" length="middle" direction="pwr"/>
-<pin name="PR0(XT2)" x="-25.4" y="-25.4" length="middle"/>
-<pin name="PR1(XT1)" x="-25.4" y="-20.32" length="middle"/>
-<pin name="VCC1" x="-25.4" y="15.24" visible="pad" length="middle" direction="pwr"/>
-<pin name="VCC" x="-25.4" y="12.7" length="middle" direction="pwr"/>
-<pin name="GND1" x="-25.4" y="2.54" visible="pad" length="middle" direction="pwr"/>
-<pin name="GND" x="-25.4" y="0" length="middle" direction="pwr"/>
-<pin name="PDI_DATA" x="-25.4" y="33.02" length="middle"/>
-<pin name="GND2" x="-25.4" y="5.08" visible="pad" length="middle" direction="pwr"/>
-<pin name="!RESET!/PDI_CLK" x="-25.4" y="38.1" length="middle"/>
-</symbol>
-</symbols>
-<devicesets>
-<deviceset name="ATXMEGA_A4U">
-<gates>
-<gate name="G$1" symbol="ATXMEGA_A4U" x="0" y="0"/>
-</gates>
-<devices>
-<device name="TQFP-44-1-64" package="TQFP44-13THIN">
-<connects>
-<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
-<connect gate="G$1" pin="AVCC" pad="39"/>
-<connect gate="G$1" pin="GND" pad="8"/>
-<connect gate="G$1" pin="GND1" pad="18"/>
-<connect gate="G$1" pin="GND2" pad="30"/>
-<connect gate="G$1" pin="GND3" pad="38"/>
-<connect gate="G$1" pin="PA0" pad="40"/>
-<connect gate="G$1" pin="PA1" pad="41"/>
-<connect gate="G$1" pin="PA2" pad="42"/>
-<connect gate="G$1" pin="PA3" pad="43"/>
-<connect gate="G$1" pin="PA4" pad="44"/>
-<connect gate="G$1" pin="PA5" pad="1"/>
-<connect gate="G$1" pin="PA6" pad="2"/>
-<connect gate="G$1" pin="PA7" pad="3"/>
-<connect gate="G$1" pin="PB0" pad="4"/>
-<connect gate="G$1" pin="PB1" pad="5"/>
-<connect gate="G$1" pin="PB2" pad="6"/>
-<connect gate="G$1" pin="PB3" pad="7"/>
-<connect gate="G$1" pin="PC0/SDA" pad="10"/>
-<connect gate="G$1" pin="PC1/SCL/XCK0" pad="11"/>
-<connect gate="G$1" pin="PC2/RXD0" pad="12"/>
-<connect gate="G$1" pin="PC3/TXD0" pad="13"/>
-<connect gate="G$1" pin="PC4/CS" pad="14"/>
-<connect gate="G$1" pin="PC5/XCK1/MOSI" pad="15"/>
-<connect gate="G$1" pin="PC6/RXD1/MISO" pad="16"/>
-<connect gate="G$1" pin="PC7/TXD1/SCK" pad="17"/>
-<connect gate="G$1" pin="PD0" pad="20"/>
-<connect gate="G$1" pin="PD1/XCK0" pad="21"/>
-<connect gate="G$1" pin="PD2/RXD0" pad="22"/>
-<connect gate="G$1" pin="PD3/TXD0" pad="23"/>
-<connect gate="G$1" pin="PD4/CS" pad="24"/>
-<connect gate="G$1" pin="PD5/XCK1/MOSI" pad="25"/>
-<connect gate="G$1" pin="PD6/RXD1/MISO/DM" pad="26"/>
-<connect gate="G$1" pin="PD7/TXD1/SCK/DP" pad="27"/>
-<connect gate="G$1" pin="PDI_DATA" pad="34"/>
-<connect gate="G$1" pin="PE0/SDA" pad="28"/>
-<connect gate="G$1" pin="PE1/XCK0/SCL" pad="29"/>
-<connect gate="G$1" pin="PE2/RXD0" pad="32"/>
-<connect gate="G$1" pin="PE3/TXD0" pad="33"/>
-<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
-<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
-<connect gate="G$1" pin="VCC" pad="9"/>
-<connect gate="G$1" pin="VCC1" pad="19"/>
-<connect gate="G$1" pin="VCC2" pad="31"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="VFQFN-44" package="QFN-44-7X7">
-<connects>
-<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
-<connect gate="G$1" pin="AVCC" pad="39"/>
-<connect gate="G$1" pin="GND" pad="8 TH"/>
-<connect gate="G$1" pin="GND1" pad="18"/>
-<connect gate="G$1" pin="GND2" pad="30"/>
-<connect gate="G$1" pin="GND3" pad="38"/>
-<connect gate="G$1" pin="PA0" pad="40"/>
-<connect gate="G$1" pin="PA1" pad="41"/>
-<connect gate="G$1" pin="PA2" pad="42"/>
-<connect gate="G$1" pin="PA3" pad="43"/>
-<connect gate="G$1" pin="PA4" pad="44"/>
-<connect gate="G$1" pin="PA5" pad="1"/>
-<connect gate="G$1" pin="PA6" pad="2"/>
-<connect gate="G$1" pin="PA7" pad="3"/>
-<connect gate="G$1" pin="PB0" pad="4"/>
-<connect gate="G$1" pin="PB1" pad="5"/>
-<connect gate="G$1" pin="PB2" pad="6"/>
-<connect gate="G$1" pin="PB3" pad="7"/>
-<connect gate="G$1" pin="PC0/SDA" pad="10"/>
-<connect gate="G$1" pin="PC1/SCL/XCK0" pad="11"/>
-<connect gate="G$1" pin="PC2/RXD0" pad="12"/>
-<connect gate="G$1" pin="PC3/TXD0" pad="13"/>
-<connect gate="G$1" pin="PC4/CS" pad="14"/>
-<connect gate="G$1" pin="PC5/XCK1/MOSI" pad="15"/>
-<connect gate="G$1" pin="PC6/RXD1/MISO" pad="16"/>
-<connect gate="G$1" pin="PC7/TXD1/SCK" pad="17"/>
-<connect gate="G$1" pin="PD0" pad="20"/>
-<connect gate="G$1" pin="PD1/XCK0" pad="21"/>
-<connect gate="G$1" pin="PD2/RXD0" pad="22"/>
-<connect gate="G$1" pin="PD3/TXD0" pad="23"/>
-<connect gate="G$1" pin="PD4/CS" pad="24"/>
-<connect gate="G$1" pin="PD5/XCK1/MOSI" pad="25"/>
-<connect gate="G$1" pin="PD6/RXD1/MISO/DM" pad="26"/>
-<connect gate="G$1" pin="PD7/TXD1/SCK/DP" pad="27"/>
-<connect gate="G$1" pin="PDI_DATA" pad="34"/>
-<connect gate="G$1" pin="PE0/SDA" pad="28"/>
-<connect gate="G$1" pin="PE1/XCK0/SCL" pad="29"/>
-<connect gate="G$1" pin="PE2/RXD0" pad="32"/>
-<connect gate="G$1" pin="PE3/TXD0" pad="33"/>
-<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
-<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
-<connect gate="G$1" pin="VCC" pad="9"/>
-<connect gate="G$1" pin="VCC1" pad="19"/>
-<connect gate="G$1" pin="VCC2" pad="31"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-</devices>
-</deviceset>
-</devicesets>
-</library>
-</libraries>
-<attributes>
-</attributes>
-<variantdefs>
-</variantdefs>
-<classes>
-<class number="0" name="default" width="0" drill="0">
-</class>
-</classes>
-<parts>
-<part name="U$1" library="fab" deviceset="ATXMEGA_A4U" device="TQFP-44-1-64"/>
-</parts>
-<sheets>
-<sheet>
-<plain>
-</plain>
-<instances>
-<instance part="U$1" gate="G$1" x="43.18" y="45.72"/>
-</instances>
-<busses>
-</busses>
-<nets>
-</nets>
-</sheet>
-</sheets>
-</schematic>
-</drawing>
-</eagle>