diff --git a/README.md b/README.md
index e1c7d6f32beb3b92584e3ef903ceb697e2511f56..4c2247d59b776c1a5359ba47622d0156f8bac89d 100644
--- a/README.md
+++ b/README.md
@@ -5,18 +5,16 @@
 Currently:
 
 ### Jake
- - Hardware 0.2
- - Measure Packet Propagation
- - Implement Switching Structure in Hardware
+ - 
 
 ### Nick
- - Work w/ Patrick on implementing Dijkstra's in simulation
+ - 
 
 ### Dougie
  - 
 
 ### Patrick
- - Work on implementing hardware emulation in simulation
+ - 
 
 ## Hardware
 
diff --git a/circuit/xmega-128a4u-switch/xmega-128a4u-switch_01/eagle.epf b/circuit/xmega-128a4u-switch/xmega-128a4u-switch_01/eagle.epf
index a7bfc32af255140221e9af5ea8e45c3054709e4b..4a3eb6c1ce0cb48982625df22d711669d4229c98 100644
--- a/circuit/xmega-128a4u-switch/xmega-128a4u-switch_01/eagle.epf
+++ b/circuit/xmega-128a4u-switch/xmega-128a4u-switch_01/eagle.epf
@@ -350,107 +350,11 @@ UsedLibraryUrn="urn:adsk.eagle:library:177"
 UsedLibrary="D:/Dropbox (Personal)/CBA/doc/libraries/eagle/fab.lbr"
 
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diff --git a/embedded/atxmega-a4u-wakeup/.vs/atxmega-a4u-wakeup/v14/.atsuo b/embedded/atxmega-a4u-wakeup/.vs/atxmega-a4u-wakeup/v14/.atsuo
index 51ddd42b4eefcc47e56749b44a00db5c81469c18..bf088e1463d0c4a09f4b039b6a2db53091c950b9 100644
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diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.elf b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.elf
index e7de41090e970ecf6a311ab762e94297d1a7d7f9..c4bdc319c5e9bac0394fc6e5f4ba07a7ae6ebb01 100644
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diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.hex b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.hex
index 6c7246af503df09d9b7f388aa4e36562b4173f80..79699cd07b79c45241a926f7900b01e94846d403 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.hex
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.hex
@@ -4,8 +4,8 @@
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+:100AF0002091BF203091C0202817390769F4309722
+:100B000029F41092C1201092C22002C012821382D6
+:100B1000A093BF20B093C020DF91CF910895F894A7
+:020B2000FFCF05
+:060B22000000C3202000CA
 :00000001FF
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.lss b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.lss
index ddadf4240ac2f498c71f319de7e81c99c71dc852..f94f714e52823b4be7dc1291e28e97d0890e4979 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.lss
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.lss
@@ -3,31 +3,31 @@ atxmega-a4u-wakeup.elf:     file format elf32-avr
 
 Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
-  0 .text         000009a8  00000000  00000000  00000094  2**1
+  0 .text         00000b22  00000000  00000000  00000094  2**1
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  1 .data         00000006  00802000  000009a8  00000a3c  2**0
+  1 .data         00000006  00802000  00000b22  00000bb6  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  2 .bss          00000070  00802006  00802006  00000a42  2**0
+  2 .bss          000000bd  00802006  00802006  00000bbc  2**0
                   ALLOC
-  3 .comment      00000030  00000000  00000000  00000a42  2**0
+  3 .comment      00000030  00000000  00000000  00000bbc  2**0
                   CONTENTS, READONLY
-  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00000a74  2**2
+  4 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  00000bec  2**2
                   CONTENTS, READONLY
-  5 .debug_aranges 00000100  00000000  00000000  00000ab4  2**0
+  5 .debug_aranges 00000108  00000000  00000000  00000c2c  2**0
                   CONTENTS, READONLY, DEBUGGING
-  6 .debug_info   00003c5f  00000000  00000000  00000bb4  2**0
+  6 .debug_info   00003efe  00000000  00000000  00000d34  2**0
                   CONTENTS, READONLY, DEBUGGING
-  7 .debug_abbrev 00002add  00000000  00000000  00004813  2**0
+  7 .debug_abbrev 00002b5c  00000000  00000000  00004c32  2**0
                   CONTENTS, READONLY, DEBUGGING
-  8 .debug_line   00000bd5  00000000  00000000  000072f0  2**0
+  8 .debug_line   00000d5f  00000000  00000000  0000778e  2**0
                   CONTENTS, READONLY, DEBUGGING
-  9 .debug_frame  0000032c  00000000  00000000  00007ec8  2**2
+  9 .debug_frame  00000364  00000000  00000000  000084f0  2**2
                   CONTENTS, READONLY, DEBUGGING
- 10 .debug_str    000022f6  00000000  00000000  000081f4  2**0
+ 10 .debug_str    000023f9  00000000  00000000  00008854  2**0
                   CONTENTS, READONLY, DEBUGGING
- 11 .debug_loc    0000092b  00000000  00000000  0000a4ea  2**0
+ 11 .debug_loc    00000aed  00000000  00000000  0000ac4d  2**0
                   CONTENTS, READONLY, DEBUGGING
- 12 .debug_ranges 000000d0  00000000  00000000  0000ae15  2**0
+ 12 .debug_ranges 000000d8  00000000  00000000  0000b73a  2**0
                   CONTENTS, READONLY, DEBUGGING
 
 Disassembly of section .text:
@@ -58,10 +58,10 @@ Disassembly of section .text:
   58:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
   5c:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
   60:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
-  64:	0c 94 c0 01 	jmp	0x380	; 0x380 <__vector_25>
+  64:	0c 94 6a 02 	jmp	0x4d4	; 0x4d4 <__vector_25>
   68:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
   6c:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
-  70:	0c 94 f5 01 	jmp	0x3ea	; 0x3ea <__vector_28>
+  70:	0c 94 9f 02 	jmp	0x53e	; 0x53e <__vector_28>
   74:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
   78:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
   7c:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
@@ -121,10 +121,10 @@ Disassembly of section .text:
  154:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
  158:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
  15c:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
- 160:	0c 94 2a 02 	jmp	0x454	; 0x454 <__vector_88>
+ 160:	0c 94 d4 02 	jmp	0x5a8	; 0x5a8 <__vector_88>
  164:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
  168:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
- 16c:	0c 94 5f 02 	jmp	0x4be	; 0x4be <__vector_91>
+ 16c:	0c 94 09 03 	jmp	0x612	; 0x612 <__vector_91>
  170:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
  174:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
  178:	0c 94 24 01 	jmp	0x248	; 0x248 <__bad_interrupt>
@@ -175,1150 +175,1337 @@ Disassembly of section .text:
  210:	1a be       	out	0x3a, r1	; 58
  212:	1b be       	out	0x3b, r1	; 59
 
-00000214 <__do_copy_data>:
- 214:	10 e2       	ldi	r17, 0x20	; 32
- 216:	a0 e0       	ldi	r26, 0x00	; 0
+00000214 <__do_clear_bss>:
+ 214:	20 e2       	ldi	r18, 0x20	; 32
+ 216:	a6 e0       	ldi	r26, 0x06	; 6
  218:	b0 e2       	ldi	r27, 0x20	; 32
- 21a:	e8 ea       	ldi	r30, 0xA8	; 168
- 21c:	f9 e0       	ldi	r31, 0x09	; 9
- 21e:	00 e0       	ldi	r16, 0x00	; 0
- 220:	0b bf       	out	0x3b, r16	; 59
- 222:	02 c0       	rjmp	.+4      	; 0x228 <__do_copy_data+0x14>
- 224:	07 90       	elpm	r0, Z+
- 226:	0d 92       	st	X+, r0
- 228:	a6 30       	cpi	r26, 0x06	; 6
- 22a:	b1 07       	cpc	r27, r17
- 22c:	d9 f7       	brne	.-10     	; 0x224 <__do_copy_data+0x10>
- 22e:	1b be       	out	0x3b, r1	; 59
+ 21a:	01 c0       	rjmp	.+2      	; 0x21e <.do_clear_bss_start>
 
-00000230 <__do_clear_bss>:
- 230:	20 e2       	ldi	r18, 0x20	; 32
- 232:	a6 e0       	ldi	r26, 0x06	; 6
- 234:	b0 e2       	ldi	r27, 0x20	; 32
- 236:	01 c0       	rjmp	.+2      	; 0x23a <.do_clear_bss_start>
+0000021c <.do_clear_bss_loop>:
+ 21c:	1d 92       	st	X+, r1
 
-00000238 <.do_clear_bss_loop>:
- 238:	1d 92       	st	X+, r1
+0000021e <.do_clear_bss_start>:
+ 21e:	a3 3c       	cpi	r26, 0xC3	; 195
+ 220:	b2 07       	cpc	r27, r18
+ 222:	e1 f7       	brne	.-8      	; 0x21c <.do_clear_bss_loop>
 
-0000023a <.do_clear_bss_start>:
- 23a:	a6 37       	cpi	r26, 0x76	; 118
- 23c:	b2 07       	cpc	r27, r18
- 23e:	e1 f7       	brne	.-8      	; 0x238 <.do_clear_bss_loop>
- 240:	0e 94 26 01 	call	0x24c	; 0x24c <main>
- 244:	0c 94 d2 04 	jmp	0x9a4	; 0x9a4 <_exit>
+00000224 <__do_copy_data>:
+ 224:	10 e2       	ldi	r17, 0x20	; 32
+ 226:	a0 e0       	ldi	r26, 0x00	; 0
+ 228:	b0 e2       	ldi	r27, 0x20	; 32
+ 22a:	e2 e2       	ldi	r30, 0x22	; 34
+ 22c:	fb e0       	ldi	r31, 0x0B	; 11
+ 22e:	00 e0       	ldi	r16, 0x00	; 0
+ 230:	0b bf       	out	0x3b, r16	; 59
+ 232:	02 c0       	rjmp	.+4      	; 0x238 <__do_copy_data+0x14>
+ 234:	07 90       	elpm	r0, Z+
+ 236:	0d 92       	st	X+, r0
+ 238:	a6 30       	cpi	r26, 0x06	; 6
+ 23a:	b1 07       	cpc	r27, r17
+ 23c:	d9 f7       	brne	.-10     	; 0x234 <__do_copy_data+0x10>
+ 23e:	1b be       	out	0x3b, r1	; 59
+ 240:	0e 94 5c 01 	call	0x2b8	; 0x2b8 <main>
+ 244:	0c 94 8f 05 	jmp	0xb1e	; 0xb1e <_exit>
 
 00000248 <__bad_interrupt>:
  248:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>
 
-0000024c <main>:
+0000024c <testpacket1>:
 
 /*
 turns on global interrupt control
 */
 void interrupts(){
 	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
- 24c:	cf 93       	push	r28
- 24e:	df 93       	push	r29
- 250:	cd b7       	in	r28, 0x3d	; 61
- 252:	de b7       	in	r29, 0x3e	; 62
- 254:	6c 97       	sbiw	r28, 0x1c	; 28
- 256:	cd bf       	out	0x3d, r28	; 61
- 258:	de bf       	out	0x3e, r29	; 62
- 25a:	e0 e5       	ldi	r30, 0x50	; 80
- 25c:	f0 e0       	ldi	r31, 0x00	; 0
- 25e:	88 e1       	ldi	r24, 0x18	; 24
- 260:	85 83       	std	Z+5, r24	; 0x05
- 262:	80 e1       	ldi	r24, 0x10	; 16
- 264:	80 83       	st	Z, r24
- 266:	81 81       	ldd	r24, Z+1	; 0x01
- 268:	84 ff       	sbrs	r24, 4
- 26a:	fd cf       	rjmp	.-6      	; 0x266 <main+0x1a>
- 26c:	88 ed       	ldi	r24, 0xD8	; 216
- 26e:	84 bf       	out	0x34, r24	; 52
- 270:	84 e0       	ldi	r24, 0x04	; 4
- 272:	80 93 40 00 	sts	0x0040, r24	; 0x800040 <__TEXT_REGION_LENGTH__+0x700040>
- 276:	68 94       	set
- 278:	ee 24       	eor	r14, r14
- 27a:	e4 f8       	bld	r14, 4
- 27c:	08 e0       	ldi	r16, 0x08	; 8
- 27e:	24 e0       	ldi	r18, 0x04	; 4
- 280:	40 e4       	ldi	r20, 0x40	; 64
- 282:	56 e0       	ldi	r21, 0x06	; 6
- 284:	60 ea       	ldi	r22, 0xA0	; 160
- 286:	78 e0       	ldi	r23, 0x08	; 8
- 288:	ce 01       	movw	r24, r28
- 28a:	02 96       	adiw	r24, 0x02	; 2
- 28c:	0e 94 fa 02 	call	0x5f4	; 0x5f4 <tp_new>
- 290:	8b e1       	ldi	r24, 0x1B	; 27
- 292:	fe 01       	movw	r30, r28
- 294:	32 96       	adiw	r30, 0x02	; 2
- 296:	a1 e2       	ldi	r26, 0x21	; 33
- 298:	b0 e2       	ldi	r27, 0x20	; 32
- 29a:	01 90       	ld	r0, Z+
- 29c:	0d 92       	st	X+, r0
- 29e:	8a 95       	dec	r24
- 2a0:	e1 f7       	brne	.-8      	; 0x29a <main+0x4e>
- 2a2:	81 e2       	ldi	r24, 0x21	; 33
- 2a4:	90 e2       	ldi	r25, 0x20	; 32
- 2a6:	0e 94 2f 03 	call	0x65e	; 0x65e <tp_init>
- 2aa:	68 94       	set
- 2ac:	ee 24       	eor	r14, r14
- 2ae:	e5 f8       	bld	r14, 5
- 2b0:	00 e8       	ldi	r16, 0x80	; 128
- 2b2:	20 e4       	ldi	r18, 0x40	; 64
- 2b4:	40 e4       	ldi	r20, 0x40	; 64
- 2b6:	56 e0       	ldi	r21, 0x06	; 6
- 2b8:	60 eb       	ldi	r22, 0xB0	; 176
- 2ba:	78 e0       	ldi	r23, 0x08	; 8
- 2bc:	ce 01       	movw	r24, r28
- 2be:	02 96       	adiw	r24, 0x02	; 2
- 2c0:	0e 94 fa 02 	call	0x5f4	; 0x5f4 <tp_new>
- 2c4:	8b e1       	ldi	r24, 0x1B	; 27
- 2c6:	fe 01       	movw	r30, r28
- 2c8:	32 96       	adiw	r30, 0x02	; 2
- 2ca:	a6 e0       	ldi	r26, 0x06	; 6
- 2cc:	b0 e2       	ldi	r27, 0x20	; 32
- 2ce:	01 90       	ld	r0, Z+
- 2d0:	0d 92       	st	X+, r0
- 2d2:	8a 95       	dec	r24
- 2d4:	e1 f7       	brne	.-8      	; 0x2ce <main+0x82>
- 2d6:	86 e0       	ldi	r24, 0x06	; 6
- 2d8:	90 e2       	ldi	r25, 0x20	; 32
- 2da:	0e 94 2f 03 	call	0x65e	; 0x65e <tp_init>
- 2de:	68 94       	set
- 2e0:	ee 24       	eor	r14, r14
- 2e2:	e4 f8       	bld	r14, 4
- 2e4:	08 e0       	ldi	r16, 0x08	; 8
- 2e6:	24 e0       	ldi	r18, 0x04	; 4
- 2e8:	40 e6       	ldi	r20, 0x60	; 96
- 2ea:	56 e0       	ldi	r21, 0x06	; 6
- 2ec:	60 ea       	ldi	r22, 0xA0	; 160
- 2ee:	79 e0       	ldi	r23, 0x09	; 9
- 2f0:	ce 01       	movw	r24, r28
- 2f2:	02 96       	adiw	r24, 0x02	; 2
- 2f4:	0e 94 fa 02 	call	0x5f4	; 0x5f4 <tp_new>
- 2f8:	8b e1       	ldi	r24, 0x1B	; 27
- 2fa:	fe 01       	movw	r30, r28
- 2fc:	32 96       	adiw	r30, 0x02	; 2
- 2fe:	a7 e5       	ldi	r26, 0x57	; 87
- 300:	b0 e2       	ldi	r27, 0x20	; 32
- 302:	01 90       	ld	r0, Z+
- 304:	0d 92       	st	X+, r0
- 306:	8a 95       	dec	r24
- 308:	e1 f7       	brne	.-8      	; 0x302 <main+0xb6>
- 30a:	87 e5       	ldi	r24, 0x57	; 87
- 30c:	90 e2       	ldi	r25, 0x20	; 32
- 30e:	0e 94 2f 03 	call	0x65e	; 0x65e <tp_init>
- 312:	68 94       	set
- 314:	ee 24       	eor	r14, r14
- 316:	e5 f8       	bld	r14, 5
- 318:	00 e8       	ldi	r16, 0x80	; 128
- 31a:	20 e4       	ldi	r18, 0x40	; 64
- 31c:	40 e6       	ldi	r20, 0x60	; 96
- 31e:	56 e0       	ldi	r21, 0x06	; 6
- 320:	60 eb       	ldi	r22, 0xB0	; 176
- 322:	79 e0       	ldi	r23, 0x09	; 9
- 324:	ce 01       	movw	r24, r28
- 326:	02 96       	adiw	r24, 0x02	; 2
- 328:	0e 94 fa 02 	call	0x5f4	; 0x5f4 <tp_new>
- 32c:	8b e1       	ldi	r24, 0x1B	; 27
- 32e:	fe 01       	movw	r30, r28
- 330:	32 96       	adiw	r30, 0x02	; 2
- 332:	ac e3       	ldi	r26, 0x3C	; 60
- 334:	b0 e2       	ldi	r27, 0x20	; 32
- 336:	01 90       	ld	r0, Z+
- 338:	0d 92       	st	X+, r0
- 33a:	8a 95       	dec	r24
- 33c:	e1 f7       	brne	.-8      	; 0x336 <main+0xea>
- 33e:	8c e3       	ldi	r24, 0x3C	; 60
- 340:	90 e2       	ldi	r25, 0x20	; 32
- 342:	0e 94 2f 03 	call	0x65e	; 0x65e <tp_init>
- 346:	e0 ea       	ldi	r30, 0xA0	; 160
- 348:	f0 e0       	ldi	r31, 0x00	; 0
- 34a:	82 81       	ldd	r24, Z+2	; 0x02
- 34c:	87 60       	ori	r24, 0x07	; 7
- 34e:	82 83       	std	Z+2, r24	; 0x02
- 350:	78 94       	sei
- 352:	81 e2       	ldi	r24, 0x21	; 33
- 354:	90 e2       	ldi	r25, 0x20	; 32
- 356:	0e 94 94 03 	call	0x728	; 0x728 <tp_statflash>
- 35a:	be 01       	movw	r22, r28
- 35c:	6f 5f       	subi	r22, 0xFF	; 255
- 35e:	7f 4f       	sbci	r23, 0xFF	; 255
- 360:	86 e0       	ldi	r24, 0x06	; 6
- 362:	90 e2       	ldi	r25, 0x20	; 32
- 364:	0e 94 83 03 	call	0x706	; 0x706 <tp_read>
- 368:	88 23       	and	r24, r24
- 36a:	99 f3       	breq	.-26     	; 0x352 <main+0x106>
- 36c:	87 e5       	ldi	r24, 0x57	; 87
- 36e:	90 e2       	ldi	r25, 0x20	; 32
- 370:	0e 94 94 03 	call	0x728	; 0x728 <tp_statflash>
- 374:	69 81       	ldd	r22, Y+1	; 0x01
- 376:	8c e3       	ldi	r24, 0x3C	; 60
- 378:	90 e2       	ldi	r25, 0x20	; 32
- 37a:	0e 94 8c 03 	call	0x718	; 0x718 <tp_write>
- 37e:	e9 cf       	rjmp	.-46     	; 0x352 <main+0x106>
+ 24c:	0f 93       	push	r16
+ 24e:	1f 93       	push	r17
+ 250:	cf 93       	push	r28
+ 252:	df 93       	push	r29
+ 254:	88 e0       	ldi	r24, 0x08	; 8
+ 256:	80 93 45 06 	sts	0x0645, r24	; 0x800645 <__TEXT_REGION_LENGTH__+0x700645>
+ 25a:	ce e5       	ldi	r28, 0x5E	; 94
+ 25c:	d0 e2       	ldi	r29, 0x20	; 32
+ 25e:	04 ea       	ldi	r16, 0xA4	; 164
+ 260:	10 e2       	ldi	r17, 0x20	; 32
+ 262:	69 91       	ld	r22, Y+
+ 264:	83 e4       	ldi	r24, 0x43	; 67
+ 266:	90 e2       	ldi	r25, 0x20	; 32
+ 268:	0e 94 37 04 	call	0x86e	; 0x86e <tp_write>
+ 26c:	c0 17       	cp	r28, r16
+ 26e:	d1 07       	cpc	r29, r17
+ 270:	c1 f7       	brne	.-16     	; 0x262 <testpacket1+0x16>
+ 272:	88 e0       	ldi	r24, 0x08	; 8
+ 274:	80 93 46 06 	sts	0x0646, r24	; 0x800646 <__TEXT_REGION_LENGTH__+0x700646>
+ 278:	df 91       	pop	r29
+ 27a:	cf 91       	pop	r28
+ 27c:	1f 91       	pop	r17
+ 27e:	0f 91       	pop	r16
+ 280:	08 95       	ret
 
-00000380 <__vector_25>:
+00000282 <testpacket2>:
+ 282:	0f 93       	push	r16
+ 284:	1f 93       	push	r17
+ 286:	cf 93       	push	r28
+ 288:	df 93       	push	r29
+ 28a:	88 e0       	ldi	r24, 0x08	; 8
+ 28c:	80 93 45 06 	sts	0x0645, r24	; 0x800645 <__TEXT_REGION_LENGTH__+0x700645>
+ 290:	c6 e0       	ldi	r28, 0x06	; 6
+ 292:	d0 e2       	ldi	r29, 0x20	; 32
+ 294:	0d e0       	ldi	r16, 0x0D	; 13
+ 296:	10 e2       	ldi	r17, 0x20	; 32
+ 298:	69 91       	ld	r22, Y+
+ 29a:	83 e4       	ldi	r24, 0x43	; 67
+ 29c:	90 e2       	ldi	r25, 0x20	; 32
+ 29e:	0e 94 37 04 	call	0x86e	; 0x86e <tp_write>
+ 2a2:	c0 17       	cp	r28, r16
+ 2a4:	d1 07       	cpc	r29, r17
+ 2a6:	c1 f7       	brne	.-16     	; 0x298 <testpacket2+0x16>
+ 2a8:	88 e0       	ldi	r24, 0x08	; 8
+ 2aa:	80 93 46 06 	sts	0x0646, r24	; 0x800646 <__TEXT_REGION_LENGTH__+0x700646>
+ 2ae:	df 91       	pop	r29
+ 2b0:	cf 91       	pop	r28
+ 2b2:	1f 91       	pop	r17
+ 2b4:	0f 91       	pop	r16
+ 2b6:	08 95       	ret
+
+000002b8 <main>:
+ 2b8:	cf 93       	push	r28
+ 2ba:	df 93       	push	r29
+ 2bc:	cd b7       	in	r28, 0x3d	; 61
+ 2be:	de b7       	in	r29, 0x3e	; 62
+ 2c0:	6c 97       	sbiw	r28, 0x1c	; 28
+ 2c2:	cd bf       	out	0x3d, r28	; 61
+ 2c4:	de bf       	out	0x3e, r29	; 62
+ 2c6:	e0 e5       	ldi	r30, 0x50	; 80
+ 2c8:	f0 e0       	ldi	r31, 0x00	; 0
+ 2ca:	88 e1       	ldi	r24, 0x18	; 24
+ 2cc:	85 83       	std	Z+5, r24	; 0x05
+ 2ce:	80 e1       	ldi	r24, 0x10	; 16
+ 2d0:	80 83       	st	Z, r24
+ 2d2:	81 81       	ldd	r24, Z+1	; 0x01
+ 2d4:	84 ff       	sbrs	r24, 4
+ 2d6:	fd cf       	rjmp	.-6      	; 0x2d2 <main+0x1a>
+ 2d8:	88 ed       	ldi	r24, 0xD8	; 216
+ 2da:	84 bf       	out	0x34, r24	; 52
+ 2dc:	14 e0       	ldi	r17, 0x04	; 4
+ 2de:	10 93 40 00 	sts	0x0040, r17	; 0x800040 <__TEXT_REGION_LENGTH__+0x700040>
+ 2e2:	68 94       	set
+ 2e4:	ee 24       	eor	r14, r14
+ 2e6:	e4 f8       	bld	r14, 4
+ 2e8:	08 e0       	ldi	r16, 0x08	; 8
+ 2ea:	24 e0       	ldi	r18, 0x04	; 4
+ 2ec:	40 e4       	ldi	r20, 0x40	; 64
+ 2ee:	56 e0       	ldi	r21, 0x06	; 6
+ 2f0:	60 ea       	ldi	r22, 0xA0	; 160
+ 2f2:	78 e0       	ldi	r23, 0x08	; 8
+ 2f4:	ce 01       	movw	r24, r28
+ 2f6:	02 96       	adiw	r24, 0x02	; 2
+ 2f8:	0e 94 a4 03 	call	0x748	; 0x748 <tp_new>
+ 2fc:	8b e1       	ldi	r24, 0x1B	; 27
+ 2fe:	fe 01       	movw	r30, r28
+ 300:	32 96       	adiw	r30, 0x02	; 2
+ 302:	a8 e2       	ldi	r26, 0x28	; 40
+ 304:	b0 e2       	ldi	r27, 0x20	; 32
+ 306:	01 90       	ld	r0, Z+
+ 308:	0d 92       	st	X+, r0
+ 30a:	8a 95       	dec	r24
+ 30c:	e1 f7       	brne	.-8      	; 0x306 <main+0x4e>
+ 30e:	88 e0       	ldi	r24, 0x08	; 8
+ 310:	80 93 41 06 	sts	0x0641, r24	; 0x800641 <__TEXT_REGION_LENGTH__+0x700641>
+ 314:	68 94       	set
+ 316:	ee 24       	eor	r14, r14
+ 318:	e5 f8       	bld	r14, 5
+ 31a:	00 e8       	ldi	r16, 0x80	; 128
+ 31c:	20 e4       	ldi	r18, 0x40	; 64
+ 31e:	40 e4       	ldi	r20, 0x40	; 64
+ 320:	56 e0       	ldi	r21, 0x06	; 6
+ 322:	60 eb       	ldi	r22, 0xB0	; 176
+ 324:	78 e0       	ldi	r23, 0x08	; 8
+ 326:	ce 01       	movw	r24, r28
+ 328:	02 96       	adiw	r24, 0x02	; 2
+ 32a:	0e 94 a4 03 	call	0x748	; 0x748 <tp_new>
+ 32e:	8b e1       	ldi	r24, 0x1B	; 27
+ 330:	fe 01       	movw	r30, r28
+ 332:	32 96       	adiw	r30, 0x02	; 2
+ 334:	ad e0       	ldi	r26, 0x0D	; 13
+ 336:	b0 e2       	ldi	r27, 0x20	; 32
+ 338:	01 90       	ld	r0, Z+
+ 33a:	0d 92       	st	X+, r0
+ 33c:	8a 95       	dec	r24
+ 33e:	e1 f7       	brne	.-8      	; 0x338 <main+0x80>
+ 340:	8d e0       	ldi	r24, 0x0D	; 13
+ 342:	90 e2       	ldi	r25, 0x20	; 32
+ 344:	0e 94 d9 03 	call	0x7b2	; 0x7b2 <tp_init>
+ 348:	68 94       	set
+ 34a:	ee 24       	eor	r14, r14
+ 34c:	e4 f8       	bld	r14, 4
+ 34e:	08 e0       	ldi	r16, 0x08	; 8
+ 350:	24 e0       	ldi	r18, 0x04	; 4
+ 352:	40 e6       	ldi	r20, 0x60	; 96
+ 354:	56 e0       	ldi	r21, 0x06	; 6
+ 356:	60 ea       	ldi	r22, 0xA0	; 160
+ 358:	79 e0       	ldi	r23, 0x09	; 9
+ 35a:	ce 01       	movw	r24, r28
+ 35c:	02 96       	adiw	r24, 0x02	; 2
+ 35e:	0e 94 a4 03 	call	0x748	; 0x748 <tp_new>
+ 362:	8b e1       	ldi	r24, 0x1B	; 27
+ 364:	fe 01       	movw	r30, r28
+ 366:	32 96       	adiw	r30, 0x02	; 2
+ 368:	a4 ea       	ldi	r26, 0xA4	; 164
+ 36a:	b0 e2       	ldi	r27, 0x20	; 32
+ 36c:	01 90       	ld	r0, Z+
+ 36e:	0d 92       	st	X+, r0
+ 370:	8a 95       	dec	r24
+ 372:	e1 f7       	brne	.-8      	; 0x36c <main+0xb4>
+ 374:	84 ea       	ldi	r24, 0xA4	; 164
+ 376:	90 e2       	ldi	r25, 0x20	; 32
+ 378:	0e 94 d9 03 	call	0x7b2	; 0x7b2 <tp_init>
+ 37c:	68 94       	set
+ 37e:	ee 24       	eor	r14, r14
+ 380:	e5 f8       	bld	r14, 5
+ 382:	00 e8       	ldi	r16, 0x80	; 128
+ 384:	20 e4       	ldi	r18, 0x40	; 64
+ 386:	40 e6       	ldi	r20, 0x60	; 96
+ 388:	56 e0       	ldi	r21, 0x06	; 6
+ 38a:	60 eb       	ldi	r22, 0xB0	; 176
+ 38c:	79 e0       	ldi	r23, 0x09	; 9
+ 38e:	ce 01       	movw	r24, r28
+ 390:	02 96       	adiw	r24, 0x02	; 2
+ 392:	0e 94 a4 03 	call	0x748	; 0x748 <tp_new>
+ 396:	8b e1       	ldi	r24, 0x1B	; 27
+ 398:	fe 01       	movw	r30, r28
+ 39a:	32 96       	adiw	r30, 0x02	; 2
+ 39c:	a3 e4       	ldi	r26, 0x43	; 67
+ 39e:	b0 e2       	ldi	r27, 0x20	; 32
+ 3a0:	01 90       	ld	r0, Z+
+ 3a2:	0d 92       	st	X+, r0
+ 3a4:	8a 95       	dec	r24
+ 3a6:	e1 f7       	brne	.-8      	; 0x3a0 <main+0xe8>
+ 3a8:	83 e4       	ldi	r24, 0x43	; 67
+ 3aa:	90 e2       	ldi	r25, 0x20	; 32
+ 3ac:	0e 94 d9 03 	call	0x7b2	; 0x7b2 <tp_init>
+ 3b0:	e0 e6       	ldi	r30, 0x60	; 96
+ 3b2:	f6 e0       	ldi	r31, 0x06	; 6
+ 3b4:	92 e0       	ldi	r25, 0x02	; 2
+ 3b6:	92 83       	std	Z+2, r25	; 0x02
+ 3b8:	21 e0       	ldi	r18, 0x01	; 1
+ 3ba:	22 83       	std	Z+2, r18	; 0x02
+ 3bc:	88 e1       	ldi	r24, 0x18	; 24
+ 3be:	81 8b       	std	Z+17, r24	; 0x11
+ 3c0:	80 8b       	std	Z+16, r24	; 0x10
+ 3c2:	e0 ea       	ldi	r30, 0xA0	; 160
+ 3c4:	f0 e0       	ldi	r31, 0x00	; 0
+ 3c6:	82 81       	ldd	r24, Z+2	; 0x02
+ 3c8:	87 60       	ori	r24, 0x07	; 7
+ 3ca:	82 83       	std	Z+2, r24	; 0x02
+ 3cc:	78 94       	sei
+ 3ce:	ee e5       	ldi	r30, 0x5E	; 94
+ 3d0:	f0 e2       	ldi	r31, 0x20	; 32
+ 3d2:	8e e7       	ldi	r24, 0x7E	; 126
+ 3d4:	80 83       	st	Z, r24
+ 3d6:	21 83       	std	Z+1, r18	; 0x01
+ 3d8:	92 83       	std	Z+2, r25	; 0x02
+ 3da:	13 83       	std	Z+3, r17	; 0x03
+ 3dc:	90 e4       	ldi	r25, 0x40	; 64
+ 3de:	94 83       	std	Z+4, r25	; 0x04
+ 3e0:	80 93 a3 20 	sts	0x20A3, r24	; 0x8020a3 <tpacket1+0x45>
+ 3e4:	e6 e0       	ldi	r30, 0x06	; 6
+ 3e6:	f0 e2       	ldi	r31, 0x20	; 32
+ 3e8:	80 83       	st	Z, r24
+ 3ea:	86 83       	std	Z+6, r24	; 0x06
+ 3ec:	0d e0       	ldi	r16, 0x0D	; 13
+ 3ee:	10 e2       	ldi	r17, 0x20	; 32
+ 3f0:	0f 2e       	mov	r0, r31
+ 3f2:	f0 e6       	ldi	r31, 0x60	; 96
+ 3f4:	ef 2e       	mov	r14, r31
+ 3f6:	f6 e0       	ldi	r31, 0x06	; 6
+ 3f8:	ff 2e       	mov	r15, r31
+ 3fa:	f0 2d       	mov	r31, r0
+ 3fc:	0f 2e       	mov	r0, r31
+ 3fe:	f0 e4       	ldi	r31, 0x40	; 64
+ 400:	cf 2e       	mov	r12, r31
+ 402:	f6 e0       	ldi	r31, 0x06	; 6
+ 404:	df 2e       	mov	r13, r31
+ 406:	f0 2d       	mov	r31, r0
+ 408:	68 94       	set
+ 40a:	bb 24       	eor	r11, r11
+ 40c:	b3 f8       	bld	r11, 3
+ 40e:	88 e2       	ldi	r24, 0x28	; 40
+ 410:	90 e2       	ldi	r25, 0x20	; 32
+ 412:	0e 94 3f 04 	call	0x87e	; 0x87e <tp_statflash>
+ 416:	f8 01       	movw	r30, r16
+ 418:	81 85       	ldd	r24, Z+9	; 0x09
+ 41a:	82 30       	cpi	r24, 0x02	; 2
+ 41c:	39 f5       	brne	.+78     	; 0x46c <__LOCK_REGION_LENGTH__+0x6c>
+ 41e:	84 ea       	ldi	r24, 0xA4	; 164
+ 420:	90 e2       	ldi	r25, 0x20	; 32
+ 422:	0e 94 48 04 	call	0x890	; 0x890 <tp_stathi>
+ 426:	f6 01       	movw	r30, r12
+ 428:	b5 82       	std	Z+5, r11	; 0x05
+ 42a:	6e e7       	ldi	r22, 0x7E	; 126
+ 42c:	83 e4       	ldi	r24, 0x43	; 67
+ 42e:	90 e2       	ldi	r25, 0x20	; 32
+ 430:	0e 94 37 04 	call	0x86e	; 0x86e <tp_write>
+ 434:	05 c0       	rjmp	.+10     	; 0x440 <__LOCK_REGION_LENGTH__+0x40>
+ 436:	69 81       	ldd	r22, Y+1	; 0x01
+ 438:	83 e4       	ldi	r24, 0x43	; 67
+ 43a:	90 e2       	ldi	r25, 0x20	; 32
+ 43c:	0e 94 37 04 	call	0x86e	; 0x86e <tp_write>
+ 440:	be 01       	movw	r22, r28
+ 442:	6f 5f       	subi	r22, 0xFF	; 255
+ 444:	7f 4f       	sbci	r23, 0xFF	; 255
+ 446:	c8 01       	movw	r24, r16
+ 448:	0e 94 2e 04 	call	0x85c	; 0x85c <tp_read>
+ 44c:	81 11       	cpse	r24, r1
+ 44e:	f3 cf       	rjmp	.-26     	; 0x436 <__LOCK_REGION_LENGTH__+0x36>
+ 450:	6e e7       	ldi	r22, 0x7E	; 126
+ 452:	83 e4       	ldi	r24, 0x43	; 67
+ 454:	90 e2       	ldi	r25, 0x20	; 32
+ 456:	0e 94 37 04 	call	0x86e	; 0x86e <tp_write>
+ 45a:	f6 01       	movw	r30, r12
+ 45c:	b6 82       	std	Z+6, r11	; 0x06
+ 45e:	84 ea       	ldi	r24, 0xA4	; 164
+ 460:	90 e2       	ldi	r25, 0x20	; 32
+ 462:	0e 94 51 04 	call	0x8a2	; 0x8a2 <tp_statlo>
+ 466:	f8 01       	movw	r30, r16
+ 468:	11 86       	std	Z+9, r1	; 0x09
+ 46a:	d1 cf       	rjmp	.-94     	; 0x40e <__LOCK_REGION_LENGTH__+0xe>
+ 46c:	f7 01       	movw	r30, r14
+ 46e:	80 85       	ldd	r24, Z+8	; 0x08
+ 470:	81 fd       	sbrc	r24, 1
+ 472:	16 c0       	rjmp	.+44     	; 0x4a0 <__LOCK_REGION_LENGTH__+0xa0>
+ 474:	84 ea       	ldi	r24, 0xA4	; 164
+ 476:	90 e2       	ldi	r25, 0x20	; 32
+ 478:	0e 94 48 04 	call	0x890	; 0x890 <tp_stathi>
+ 47c:	83 e4       	ldi	r24, 0x43	; 67
+ 47e:	90 e2       	ldi	r25, 0x20	; 32
+ 480:	0e 94 26 01 	call	0x24c	; 0x24c <testpacket1>
+ 484:	84 ea       	ldi	r24, 0xA4	; 164
+ 486:	90 e2       	ldi	r25, 0x20	; 32
+ 488:	0e 94 51 04 	call	0x8a2	; 0x8a2 <tp_statlo>
+ 48c:	ff e7       	ldi	r31, 0x7F	; 127
+ 48e:	24 e8       	ldi	r18, 0x84	; 132
+ 490:	8e e1       	ldi	r24, 0x1E	; 30
+ 492:	f1 50       	subi	r31, 0x01	; 1
+ 494:	20 40       	sbci	r18, 0x00	; 0
+ 496:	80 40       	sbci	r24, 0x00	; 0
+ 498:	e1 f7       	brne	.-8      	; 0x492 <__LOCK_REGION_LENGTH__+0x92>
+ 49a:	00 c0       	rjmp	.+0      	; 0x49c <__LOCK_REGION_LENGTH__+0x9c>
+ 49c:	00 00       	nop
+ 49e:	b7 cf       	rjmp	.-146    	; 0x40e <__LOCK_REGION_LENGTH__+0xe>
+ 4a0:	f7 01       	movw	r30, r14
+ 4a2:	80 85       	ldd	r24, Z+8	; 0x08
+ 4a4:	80 fd       	sbrc	r24, 0
+ 4a6:	b3 cf       	rjmp	.-154    	; 0x40e <__LOCK_REGION_LENGTH__+0xe>
+ 4a8:	84 ea       	ldi	r24, 0xA4	; 164
+ 4aa:	90 e2       	ldi	r25, 0x20	; 32
+ 4ac:	0e 94 48 04 	call	0x890	; 0x890 <tp_stathi>
+ 4b0:	83 e4       	ldi	r24, 0x43	; 67
+ 4b2:	90 e2       	ldi	r25, 0x20	; 32
+ 4b4:	0e 94 41 01 	call	0x282	; 0x282 <testpacket2>
+ 4b8:	84 ea       	ldi	r24, 0xA4	; 164
+ 4ba:	90 e2       	ldi	r25, 0x20	; 32
+ 4bc:	0e 94 51 04 	call	0x8a2	; 0x8a2 <tp_statlo>
+ 4c0:	ff e7       	ldi	r31, 0x7F	; 127
+ 4c2:	24 e8       	ldi	r18, 0x84	; 132
+ 4c4:	8e e1       	ldi	r24, 0x1E	; 30
+ 4c6:	f1 50       	subi	r31, 0x01	; 1
+ 4c8:	20 40       	sbci	r18, 0x00	; 0
+ 4ca:	80 40       	sbci	r24, 0x00	; 0
+ 4cc:	e1 f7       	brne	.-8      	; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6>
+ 4ce:	00 c0       	rjmp	.+0      	; 0x4d0 <__LOCK_REGION_LENGTH__+0xd0>
+ 4d0:	00 00       	nop
+ 4d2:	9d cf       	rjmp	.-198    	; 0x40e <__LOCK_REGION_LENGTH__+0xe>
+
+000004d4 <__vector_25>:
 }
 
 // hookup ISRs to port-abstracted interrupt functions
 
 ISR(USARTC0_RXC_vect){
- 380:	1f 92       	push	r1
- 382:	0f 92       	push	r0
- 384:	0f b6       	in	r0, 0x3f	; 63
- 386:	0f 92       	push	r0
- 388:	11 24       	eor	r1, r1
- 38a:	08 b6       	in	r0, 0x38	; 56
- 38c:	0f 92       	push	r0
- 38e:	18 be       	out	0x38, r1	; 56
- 390:	09 b6       	in	r0, 0x39	; 57
- 392:	0f 92       	push	r0
- 394:	19 be       	out	0x39, r1	; 57
- 396:	0b b6       	in	r0, 0x3b	; 59
- 398:	0f 92       	push	r0
- 39a:	1b be       	out	0x3b, r1	; 59
- 39c:	2f 93       	push	r18
- 39e:	3f 93       	push	r19
- 3a0:	4f 93       	push	r20
- 3a2:	5f 93       	push	r21
- 3a4:	6f 93       	push	r22
- 3a6:	7f 93       	push	r23
- 3a8:	8f 93       	push	r24
- 3aa:	9f 93       	push	r25
- 3ac:	af 93       	push	r26
- 3ae:	bf 93       	push	r27
- 3b0:	ef 93       	push	r30
- 3b2:	ff 93       	push	r31
+ 4d4:	1f 92       	push	r1
+ 4d6:	0f 92       	push	r0
+ 4d8:	0f b6       	in	r0, 0x3f	; 63
+ 4da:	0f 92       	push	r0
+ 4dc:	11 24       	eor	r1, r1
+ 4de:	08 b6       	in	r0, 0x38	; 56
+ 4e0:	0f 92       	push	r0
+ 4e2:	18 be       	out	0x38, r1	; 56
+ 4e4:	09 b6       	in	r0, 0x39	; 57
+ 4e6:	0f 92       	push	r0
+ 4e8:	19 be       	out	0x39, r1	; 57
+ 4ea:	0b b6       	in	r0, 0x3b	; 59
+ 4ec:	0f 92       	push	r0
+ 4ee:	1b be       	out	0x3b, r1	; 59
+ 4f0:	2f 93       	push	r18
+ 4f2:	3f 93       	push	r19
+ 4f4:	4f 93       	push	r20
+ 4f6:	5f 93       	push	r21
+ 4f8:	6f 93       	push	r22
+ 4fa:	7f 93       	push	r23
+ 4fc:	8f 93       	push	r24
+ 4fe:	9f 93       	push	r25
+ 500:	af 93       	push	r26
+ 502:	bf 93       	push	r27
+ 504:	ef 93       	push	r30
+ 506:	ff 93       	push	r31
 	tp_rxISR(&tp1);
- 3b4:	81 e2       	ldi	r24, 0x21	; 33
- 3b6:	90 e2       	ldi	r25, 0x20	; 32
- 3b8:	0e 94 65 03 	call	0x6ca	; 0x6ca <tp_rxISR>
+ 508:	88 e2       	ldi	r24, 0x28	; 40
+ 50a:	90 e2       	ldi	r25, 0x20	; 32
+ 50c:	0e 94 0f 04 	call	0x81e	; 0x81e <tp_rxISR>
 }
- 3bc:	ff 91       	pop	r31
- 3be:	ef 91       	pop	r30
- 3c0:	bf 91       	pop	r27
- 3c2:	af 91       	pop	r26
- 3c4:	9f 91       	pop	r25
- 3c6:	8f 91       	pop	r24
- 3c8:	7f 91       	pop	r23
- 3ca:	6f 91       	pop	r22
- 3cc:	5f 91       	pop	r21
- 3ce:	4f 91       	pop	r20
- 3d0:	3f 91       	pop	r19
- 3d2:	2f 91       	pop	r18
- 3d4:	0f 90       	pop	r0
- 3d6:	0b be       	out	0x3b, r0	; 59
- 3d8:	0f 90       	pop	r0
- 3da:	09 be       	out	0x39, r0	; 57
- 3dc:	0f 90       	pop	r0
- 3de:	08 be       	out	0x38, r0	; 56
- 3e0:	0f 90       	pop	r0
- 3e2:	0f be       	out	0x3f, r0	; 63
- 3e4:	0f 90       	pop	r0
- 3e6:	1f 90       	pop	r1
- 3e8:	18 95       	reti
+ 510:	ff 91       	pop	r31
+ 512:	ef 91       	pop	r30
+ 514:	bf 91       	pop	r27
+ 516:	af 91       	pop	r26
+ 518:	9f 91       	pop	r25
+ 51a:	8f 91       	pop	r24
+ 51c:	7f 91       	pop	r23
+ 51e:	6f 91       	pop	r22
+ 520:	5f 91       	pop	r21
+ 522:	4f 91       	pop	r20
+ 524:	3f 91       	pop	r19
+ 526:	2f 91       	pop	r18
+ 528:	0f 90       	pop	r0
+ 52a:	0b be       	out	0x3b, r0	; 59
+ 52c:	0f 90       	pop	r0
+ 52e:	09 be       	out	0x39, r0	; 57
+ 530:	0f 90       	pop	r0
+ 532:	08 be       	out	0x38, r0	; 56
+ 534:	0f 90       	pop	r0
+ 536:	0f be       	out	0x3f, r0	; 63
+ 538:	0f 90       	pop	r0
+ 53a:	1f 90       	pop	r1
+ 53c:	18 95       	reti
 
-000003ea <__vector_28>:
+0000053e <__vector_28>:
 
 
 ISR(USARTC1_RXC_vect){
- 3ea:	1f 92       	push	r1
- 3ec:	0f 92       	push	r0
- 3ee:	0f b6       	in	r0, 0x3f	; 63
- 3f0:	0f 92       	push	r0
- 3f2:	11 24       	eor	r1, r1
- 3f4:	08 b6       	in	r0, 0x38	; 56
- 3f6:	0f 92       	push	r0
- 3f8:	18 be       	out	0x38, r1	; 56
- 3fa:	09 b6       	in	r0, 0x39	; 57
- 3fc:	0f 92       	push	r0
- 3fe:	19 be       	out	0x39, r1	; 57
- 400:	0b b6       	in	r0, 0x3b	; 59
- 402:	0f 92       	push	r0
- 404:	1b be       	out	0x3b, r1	; 59
- 406:	2f 93       	push	r18
- 408:	3f 93       	push	r19
- 40a:	4f 93       	push	r20
- 40c:	5f 93       	push	r21
- 40e:	6f 93       	push	r22
- 410:	7f 93       	push	r23
- 412:	8f 93       	push	r24
- 414:	9f 93       	push	r25
- 416:	af 93       	push	r26
- 418:	bf 93       	push	r27
- 41a:	ef 93       	push	r30
- 41c:	ff 93       	push	r31
+ 53e:	1f 92       	push	r1
+ 540:	0f 92       	push	r0
+ 542:	0f b6       	in	r0, 0x3f	; 63
+ 544:	0f 92       	push	r0
+ 546:	11 24       	eor	r1, r1
+ 548:	08 b6       	in	r0, 0x38	; 56
+ 54a:	0f 92       	push	r0
+ 54c:	18 be       	out	0x38, r1	; 56
+ 54e:	09 b6       	in	r0, 0x39	; 57
+ 550:	0f 92       	push	r0
+ 552:	19 be       	out	0x39, r1	; 57
+ 554:	0b b6       	in	r0, 0x3b	; 59
+ 556:	0f 92       	push	r0
+ 558:	1b be       	out	0x3b, r1	; 59
+ 55a:	2f 93       	push	r18
+ 55c:	3f 93       	push	r19
+ 55e:	4f 93       	push	r20
+ 560:	5f 93       	push	r21
+ 562:	6f 93       	push	r22
+ 564:	7f 93       	push	r23
+ 566:	8f 93       	push	r24
+ 568:	9f 93       	push	r25
+ 56a:	af 93       	push	r26
+ 56c:	bf 93       	push	r27
+ 56e:	ef 93       	push	r30
+ 570:	ff 93       	push	r31
 	tp_rxISR(&tp2);
- 41e:	86 e0       	ldi	r24, 0x06	; 6
- 420:	90 e2       	ldi	r25, 0x20	; 32
- 422:	0e 94 65 03 	call	0x6ca	; 0x6ca <tp_rxISR>
+ 572:	8d e0       	ldi	r24, 0x0D	; 13
+ 574:	90 e2       	ldi	r25, 0x20	; 32
+ 576:	0e 94 0f 04 	call	0x81e	; 0x81e <tp_rxISR>
 }
- 426:	ff 91       	pop	r31
- 428:	ef 91       	pop	r30
- 42a:	bf 91       	pop	r27
- 42c:	af 91       	pop	r26
- 42e:	9f 91       	pop	r25
- 430:	8f 91       	pop	r24
- 432:	7f 91       	pop	r23
- 434:	6f 91       	pop	r22
- 436:	5f 91       	pop	r21
- 438:	4f 91       	pop	r20
- 43a:	3f 91       	pop	r19
- 43c:	2f 91       	pop	r18
- 43e:	0f 90       	pop	r0
- 440:	0b be       	out	0x3b, r0	; 59
- 442:	0f 90       	pop	r0
- 444:	09 be       	out	0x39, r0	; 57
- 446:	0f 90       	pop	r0
- 448:	08 be       	out	0x38, r0	; 56
- 44a:	0f 90       	pop	r0
- 44c:	0f be       	out	0x3f, r0	; 63
- 44e:	0f 90       	pop	r0
- 450:	1f 90       	pop	r1
- 452:	18 95       	reti
+ 57a:	ff 91       	pop	r31
+ 57c:	ef 91       	pop	r30
+ 57e:	bf 91       	pop	r27
+ 580:	af 91       	pop	r26
+ 582:	9f 91       	pop	r25
+ 584:	8f 91       	pop	r24
+ 586:	7f 91       	pop	r23
+ 588:	6f 91       	pop	r22
+ 58a:	5f 91       	pop	r21
+ 58c:	4f 91       	pop	r20
+ 58e:	3f 91       	pop	r19
+ 590:	2f 91       	pop	r18
+ 592:	0f 90       	pop	r0
+ 594:	0b be       	out	0x3b, r0	; 59
+ 596:	0f 90       	pop	r0
+ 598:	09 be       	out	0x39, r0	; 57
+ 59a:	0f 90       	pop	r0
+ 59c:	08 be       	out	0x38, r0	; 56
+ 59e:	0f 90       	pop	r0
+ 5a0:	0f be       	out	0x3f, r0	; 63
+ 5a2:	0f 90       	pop	r0
+ 5a4:	1f 90       	pop	r1
+ 5a6:	18 95       	reti
 
-00000454 <__vector_88>:
+000005a8 <__vector_88>:
 
 ISR(USARTD0_RXC_vect){
- 454:	1f 92       	push	r1
- 456:	0f 92       	push	r0
- 458:	0f b6       	in	r0, 0x3f	; 63
- 45a:	0f 92       	push	r0
- 45c:	11 24       	eor	r1, r1
- 45e:	08 b6       	in	r0, 0x38	; 56
- 460:	0f 92       	push	r0
- 462:	18 be       	out	0x38, r1	; 56
- 464:	09 b6       	in	r0, 0x39	; 57
- 466:	0f 92       	push	r0
- 468:	19 be       	out	0x39, r1	; 57
- 46a:	0b b6       	in	r0, 0x3b	; 59
- 46c:	0f 92       	push	r0
- 46e:	1b be       	out	0x3b, r1	; 59
- 470:	2f 93       	push	r18
- 472:	3f 93       	push	r19
- 474:	4f 93       	push	r20
- 476:	5f 93       	push	r21
- 478:	6f 93       	push	r22
- 47a:	7f 93       	push	r23
- 47c:	8f 93       	push	r24
- 47e:	9f 93       	push	r25
- 480:	af 93       	push	r26
- 482:	bf 93       	push	r27
- 484:	ef 93       	push	r30
- 486:	ff 93       	push	r31
+ 5a8:	1f 92       	push	r1
+ 5aa:	0f 92       	push	r0
+ 5ac:	0f b6       	in	r0, 0x3f	; 63
+ 5ae:	0f 92       	push	r0
+ 5b0:	11 24       	eor	r1, r1
+ 5b2:	08 b6       	in	r0, 0x38	; 56
+ 5b4:	0f 92       	push	r0
+ 5b6:	18 be       	out	0x38, r1	; 56
+ 5b8:	09 b6       	in	r0, 0x39	; 57
+ 5ba:	0f 92       	push	r0
+ 5bc:	19 be       	out	0x39, r1	; 57
+ 5be:	0b b6       	in	r0, 0x3b	; 59
+ 5c0:	0f 92       	push	r0
+ 5c2:	1b be       	out	0x3b, r1	; 59
+ 5c4:	2f 93       	push	r18
+ 5c6:	3f 93       	push	r19
+ 5c8:	4f 93       	push	r20
+ 5ca:	5f 93       	push	r21
+ 5cc:	6f 93       	push	r22
+ 5ce:	7f 93       	push	r23
+ 5d0:	8f 93       	push	r24
+ 5d2:	9f 93       	push	r25
+ 5d4:	af 93       	push	r26
+ 5d6:	bf 93       	push	r27
+ 5d8:	ef 93       	push	r30
+ 5da:	ff 93       	push	r31
 	tp_rxISR(&tp3);
- 488:	87 e5       	ldi	r24, 0x57	; 87
- 48a:	90 e2       	ldi	r25, 0x20	; 32
- 48c:	0e 94 65 03 	call	0x6ca	; 0x6ca <tp_rxISR>
+ 5dc:	84 ea       	ldi	r24, 0xA4	; 164
+ 5de:	90 e2       	ldi	r25, 0x20	; 32
+ 5e0:	0e 94 0f 04 	call	0x81e	; 0x81e <tp_rxISR>
 }
- 490:	ff 91       	pop	r31
- 492:	ef 91       	pop	r30
- 494:	bf 91       	pop	r27
- 496:	af 91       	pop	r26
- 498:	9f 91       	pop	r25
- 49a:	8f 91       	pop	r24
- 49c:	7f 91       	pop	r23
- 49e:	6f 91       	pop	r22
- 4a0:	5f 91       	pop	r21
- 4a2:	4f 91       	pop	r20
- 4a4:	3f 91       	pop	r19
- 4a6:	2f 91       	pop	r18
- 4a8:	0f 90       	pop	r0
- 4aa:	0b be       	out	0x3b, r0	; 59
- 4ac:	0f 90       	pop	r0
- 4ae:	09 be       	out	0x39, r0	; 57
- 4b0:	0f 90       	pop	r0
- 4b2:	08 be       	out	0x38, r0	; 56
- 4b4:	0f 90       	pop	r0
- 4b6:	0f be       	out	0x3f, r0	; 63
- 4b8:	0f 90       	pop	r0
- 4ba:	1f 90       	pop	r1
- 4bc:	18 95       	reti
+ 5e4:	ff 91       	pop	r31
+ 5e6:	ef 91       	pop	r30
+ 5e8:	bf 91       	pop	r27
+ 5ea:	af 91       	pop	r26
+ 5ec:	9f 91       	pop	r25
+ 5ee:	8f 91       	pop	r24
+ 5f0:	7f 91       	pop	r23
+ 5f2:	6f 91       	pop	r22
+ 5f4:	5f 91       	pop	r21
+ 5f6:	4f 91       	pop	r20
+ 5f8:	3f 91       	pop	r19
+ 5fa:	2f 91       	pop	r18
+ 5fc:	0f 90       	pop	r0
+ 5fe:	0b be       	out	0x3b, r0	; 59
+ 600:	0f 90       	pop	r0
+ 602:	09 be       	out	0x39, r0	; 57
+ 604:	0f 90       	pop	r0
+ 606:	08 be       	out	0x38, r0	; 56
+ 608:	0f 90       	pop	r0
+ 60a:	0f be       	out	0x3f, r0	; 63
+ 60c:	0f 90       	pop	r0
+ 60e:	1f 90       	pop	r1
+ 610:	18 95       	reti
 
-000004be <__vector_91>:
+00000612 <__vector_91>:
 
 ISR(USARTD1_RXC_vect){
- 4be:	1f 92       	push	r1
- 4c0:	0f 92       	push	r0
- 4c2:	0f b6       	in	r0, 0x3f	; 63
- 4c4:	0f 92       	push	r0
- 4c6:	11 24       	eor	r1, r1
- 4c8:	08 b6       	in	r0, 0x38	; 56
- 4ca:	0f 92       	push	r0
- 4cc:	18 be       	out	0x38, r1	; 56
- 4ce:	09 b6       	in	r0, 0x39	; 57
- 4d0:	0f 92       	push	r0
- 4d2:	19 be       	out	0x39, r1	; 57
- 4d4:	0b b6       	in	r0, 0x3b	; 59
- 4d6:	0f 92       	push	r0
- 4d8:	1b be       	out	0x3b, r1	; 59
- 4da:	2f 93       	push	r18
- 4dc:	3f 93       	push	r19
- 4de:	4f 93       	push	r20
- 4e0:	5f 93       	push	r21
- 4e2:	6f 93       	push	r22
- 4e4:	7f 93       	push	r23
- 4e6:	8f 93       	push	r24
- 4e8:	9f 93       	push	r25
- 4ea:	af 93       	push	r26
- 4ec:	bf 93       	push	r27
- 4ee:	ef 93       	push	r30
- 4f0:	ff 93       	push	r31
+ 612:	1f 92       	push	r1
+ 614:	0f 92       	push	r0
+ 616:	0f b6       	in	r0, 0x3f	; 63
+ 618:	0f 92       	push	r0
+ 61a:	11 24       	eor	r1, r1
+ 61c:	08 b6       	in	r0, 0x38	; 56
+ 61e:	0f 92       	push	r0
+ 620:	18 be       	out	0x38, r1	; 56
+ 622:	09 b6       	in	r0, 0x39	; 57
+ 624:	0f 92       	push	r0
+ 626:	19 be       	out	0x39, r1	; 57
+ 628:	0b b6       	in	r0, 0x3b	; 59
+ 62a:	0f 92       	push	r0
+ 62c:	1b be       	out	0x3b, r1	; 59
+ 62e:	2f 93       	push	r18
+ 630:	3f 93       	push	r19
+ 632:	4f 93       	push	r20
+ 634:	5f 93       	push	r21
+ 636:	6f 93       	push	r22
+ 638:	7f 93       	push	r23
+ 63a:	8f 93       	push	r24
+ 63c:	9f 93       	push	r25
+ 63e:	af 93       	push	r26
+ 640:	bf 93       	push	r27
+ 642:	ef 93       	push	r30
+ 644:	ff 93       	push	r31
 	tp_rxISR(&tp4);
- 4f2:	8c e3       	ldi	r24, 0x3C	; 60
- 4f4:	90 e2       	ldi	r25, 0x20	; 32
- 4f6:	0e 94 65 03 	call	0x6ca	; 0x6ca <tp_rxISR>
+ 646:	83 e4       	ldi	r24, 0x43	; 67
+ 648:	90 e2       	ldi	r25, 0x20	; 32
+ 64a:	0e 94 0f 04 	call	0x81e	; 0x81e <tp_rxISR>
 }
- 4fa:	ff 91       	pop	r31
- 4fc:	ef 91       	pop	r30
- 4fe:	bf 91       	pop	r27
- 500:	af 91       	pop	r26
- 502:	9f 91       	pop	r25
- 504:	8f 91       	pop	r24
- 506:	7f 91       	pop	r23
- 508:	6f 91       	pop	r22
- 50a:	5f 91       	pop	r21
- 50c:	4f 91       	pop	r20
- 50e:	3f 91       	pop	r19
- 510:	2f 91       	pop	r18
- 512:	0f 90       	pop	r0
- 514:	0b be       	out	0x3b, r0	; 59
- 516:	0f 90       	pop	r0
- 518:	09 be       	out	0x39, r0	; 57
- 51a:	0f 90       	pop	r0
- 51c:	08 be       	out	0x38, r0	; 56
- 51e:	0f 90       	pop	r0
- 520:	0f be       	out	0x3f, r0	; 63
- 522:	0f 90       	pop	r0
- 524:	1f 90       	pop	r1
- 526:	18 95       	reti
+ 64e:	ff 91       	pop	r31
+ 650:	ef 91       	pop	r30
+ 652:	bf 91       	pop	r27
+ 654:	af 91       	pop	r26
+ 656:	9f 91       	pop	r25
+ 658:	8f 91       	pop	r24
+ 65a:	7f 91       	pop	r23
+ 65c:	6f 91       	pop	r22
+ 65e:	5f 91       	pop	r21
+ 660:	4f 91       	pop	r20
+ 662:	3f 91       	pop	r19
+ 664:	2f 91       	pop	r18
+ 666:	0f 90       	pop	r0
+ 668:	0b be       	out	0x3b, r0	; 59
+ 66a:	0f 90       	pop	r0
+ 66c:	09 be       	out	0x39, r0	; 57
+ 66e:	0f 90       	pop	r0
+ 670:	08 be       	out	0x38, r0	; 56
+ 672:	0f 90       	pop	r0
+ 674:	0f be       	out	0x3f, r0	; 63
+ 676:	0f 90       	pop	r0
+ 678:	1f 90       	pop	r1
+ 67a:	18 95       	reti
 
-00000528 <rb_reset>:
+0000067c <rb_reset>:
 	rb_reset(rb);
 	return 1;
 }
 
 uint8_t rb_reset(ringbuffer_t *rb){
 	if(rb){
- 528:	00 97       	sbiw	r24, 0x00	; 0
- 52a:	39 f0       	breq	.+14     	; 0x53a <rb_reset+0x12>
+ 67c:	00 97       	sbiw	r24, 0x00	; 0
+ 67e:	39 f0       	breq	.+14     	; 0x68e <rb_reset+0x12>
 		rb->head = 0;
- 52c:	fc 01       	movw	r30, r24
- 52e:	12 82       	std	Z+2, r1	; 0x02
- 530:	13 82       	std	Z+3, r1	; 0x03
+ 680:	fc 01       	movw	r30, r24
+ 682:	12 82       	std	Z+2, r1	; 0x02
+ 684:	13 82       	std	Z+3, r1	; 0x03
 		rb->tail = 0;
- 532:	14 82       	std	Z+4, r1	; 0x04
- 534:	15 82       	std	Z+5, r1	; 0x05
+ 686:	14 82       	std	Z+4, r1	; 0x04
+ 688:	15 82       	std	Z+5, r1	; 0x05
 		return 1;
- 536:	81 e0       	ldi	r24, 0x01	; 1
- 538:	08 95       	ret
+ 68a:	81 e0       	ldi	r24, 0x01	; 1
+ 68c:	08 95       	ret
 	} else {
 		return 0;
- 53a:	80 e0       	ldi	r24, 0x00	; 0
+ 68e:	80 e0       	ldi	r24, 0x00	; 0
 	}
 }
- 53c:	08 95       	ret
+ 690:	08 95       	ret
 
-0000053e <rb_init>:
+00000692 <rb_init>:
 #include "ringbuffer.h"
 #include <stdlib.h>
 #include <avr/io.h>
 
 uint8_t rb_init(ringbuffer_t *rb, size_t size){
- 53e:	cf 93       	push	r28
- 540:	df 93       	push	r29
- 542:	ec 01       	movw	r28, r24
- 544:	cb 01       	movw	r24, r22
+ 692:	cf 93       	push	r28
+ 694:	df 93       	push	r29
+ 696:	ec 01       	movw	r28, r24
+ 698:	cb 01       	movw	r24, r22
 	rb->size = size;
- 546:	6e 83       	std	Y+6, r22	; 0x06
- 548:	7f 83       	std	Y+7, r23	; 0x07
+ 69a:	6e 83       	std	Y+6, r22	; 0x06
+ 69c:	7f 83       	std	Y+7, r23	; 0x07
 	rb->buffer = malloc(rb->size);
- 54a:	0e 94 b1 03 	call	0x762	; 0x762 <malloc>
- 54e:	88 83       	st	Y, r24
- 550:	99 83       	std	Y+1, r25	; 0x01
+ 69e:	0e 94 6e 04 	call	0x8dc	; 0x8dc <malloc>
+ 6a2:	88 83       	st	Y, r24
+ 6a4:	99 83       	std	Y+1, r25	; 0x01
 	rb_reset(rb);
- 552:	ce 01       	movw	r24, r28
- 554:	0e 94 94 02 	call	0x528	; 0x528 <rb_reset>
+ 6a6:	ce 01       	movw	r24, r28
+ 6a8:	0e 94 3e 03 	call	0x67c	; 0x67c <rb_reset>
 	return 1;
 }
- 558:	81 e0       	ldi	r24, 0x01	; 1
- 55a:	df 91       	pop	r29
- 55c:	cf 91       	pop	r28
- 55e:	08 95       	ret
+ 6ac:	81 e0       	ldi	r24, 0x01	; 1
+ 6ae:	df 91       	pop	r29
+ 6b0:	cf 91       	pop	r28
+ 6b2:	08 95       	ret
 
-00000560 <rb_put>:
+000006b4 <rb_put>:
 		return 0;
 	}
 }
 
 
 uint8_t rb_put(ringbuffer_t *rb, uint8_t data){
- 560:	fc 01       	movw	r30, r24
+ 6b4:	fc 01       	movw	r30, r24
 	if(rb){
- 562:	89 2b       	or	r24, r25
- 564:	f1 f0       	breq	.+60     	; 0x5a2 <rb_put+0x42>
+ 6b6:	89 2b       	or	r24, r25
+ 6b8:	f1 f0       	breq	.+60     	; 0x6f6 <rb_put+0x42>
 		rb->buffer[rb->head] = data;
- 566:	a0 81       	ld	r26, Z
- 568:	b1 81       	ldd	r27, Z+1	; 0x01
- 56a:	82 81       	ldd	r24, Z+2	; 0x02
- 56c:	93 81       	ldd	r25, Z+3	; 0x03
- 56e:	a8 0f       	add	r26, r24
- 570:	b9 1f       	adc	r27, r25
- 572:	6c 93       	st	X, r22
+ 6ba:	a0 81       	ld	r26, Z
+ 6bc:	b1 81       	ldd	r27, Z+1	; 0x01
+ 6be:	82 81       	ldd	r24, Z+2	; 0x02
+ 6c0:	93 81       	ldd	r25, Z+3	; 0x03
+ 6c2:	a8 0f       	add	r26, r24
+ 6c4:	b9 1f       	adc	r27, r25
+ 6c6:	6c 93       	st	X, r22
 		rb->head = (rb->head + 1) % rb->size; // for wrap around
- 574:	26 81       	ldd	r18, Z+6	; 0x06
- 576:	37 81       	ldd	r19, Z+7	; 0x07
- 578:	82 81       	ldd	r24, Z+2	; 0x02
- 57a:	93 81       	ldd	r25, Z+3	; 0x03
- 57c:	01 96       	adiw	r24, 0x01	; 1
- 57e:	b9 01       	movw	r22, r18
- 580:	0e 94 9d 03 	call	0x73a	; 0x73a <__udivmodhi4>
- 584:	82 83       	std	Z+2, r24	; 0x02
- 586:	93 83       	std	Z+3, r25	; 0x03
+ 6c8:	26 81       	ldd	r18, Z+6	; 0x06
+ 6ca:	37 81       	ldd	r19, Z+7	; 0x07
+ 6cc:	82 81       	ldd	r24, Z+2	; 0x02
+ 6ce:	93 81       	ldd	r25, Z+3	; 0x03
+ 6d0:	01 96       	adiw	r24, 0x01	; 1
+ 6d2:	b9 01       	movw	r22, r18
+ 6d4:	0e 94 5a 04 	call	0x8b4	; 0x8b4 <__udivmodhi4>
+ 6d8:	82 83       	std	Z+2, r24	; 0x02
+ 6da:	93 83       	std	Z+3, r25	; 0x03
 		if(rb->head == rb->tail){
- 588:	44 81       	ldd	r20, Z+4	; 0x04
- 58a:	55 81       	ldd	r21, Z+5	; 0x05
- 58c:	84 17       	cp	r24, r20
- 58e:	95 07       	cpc	r25, r21
- 590:	51 f4       	brne	.+20     	; 0x5a6 <rb_put+0x46>
+ 6dc:	44 81       	ldd	r20, Z+4	; 0x04
+ 6de:	55 81       	ldd	r21, Z+5	; 0x05
+ 6e0:	84 17       	cp	r24, r20
+ 6e2:	95 07       	cpc	r25, r21
+ 6e4:	51 f4       	brne	.+20     	; 0x6fa <rb_put+0x46>
 			rb->tail = (rb->tail + 1) % rb->size;
- 592:	01 96       	adiw	r24, 0x01	; 1
- 594:	b9 01       	movw	r22, r18
- 596:	0e 94 9d 03 	call	0x73a	; 0x73a <__udivmodhi4>
- 59a:	84 83       	std	Z+4, r24	; 0x04
- 59c:	95 83       	std	Z+5, r25	; 0x05
+ 6e6:	01 96       	adiw	r24, 0x01	; 1
+ 6e8:	b9 01       	movw	r22, r18
+ 6ea:	0e 94 5a 04 	call	0x8b4	; 0x8b4 <__udivmodhi4>
+ 6ee:	84 83       	std	Z+4, r24	; 0x04
+ 6f0:	95 83       	std	Z+5, r25	; 0x05
 		}
 		return 1;
- 59e:	81 e0       	ldi	r24, 0x01	; 1
- 5a0:	08 95       	ret
+ 6f2:	81 e0       	ldi	r24, 0x01	; 1
+ 6f4:	08 95       	ret
 	} else {
 		return 0;
- 5a2:	80 e0       	ldi	r24, 0x00	; 0
- 5a4:	08 95       	ret
+ 6f6:	80 e0       	ldi	r24, 0x00	; 0
+ 6f8:	08 95       	ret
 		rb->buffer[rb->head] = data;
 		rb->head = (rb->head + 1) % rb->size; // for wrap around
 		if(rb->head == rb->tail){
 			rb->tail = (rb->tail + 1) % rb->size;
 		}
 		return 1;
- 5a6:	81 e0       	ldi	r24, 0x01	; 1
+ 6fa:	81 e0       	ldi	r24, 0x01	; 1
 	} else {
 		return 0;
 	}
 }
- 5a8:	08 95       	ret
+ 6fc:	08 95       	ret
 
-000005aa <rb_get>:
+000006fe <rb_get>:
 
 uint8_t rb_get(ringbuffer_t *rb, uint8_t *data){
- 5aa:	fc 01       	movw	r30, r24
+ 6fe:	fc 01       	movw	r30, r24
 	if(rb && data && !rb_empty(*rb)){
- 5ac:	89 2b       	or	r24, r25
- 5ae:	e1 f0       	breq	.+56     	; 0x5e8 <rb_get+0x3e>
- 5b0:	61 15       	cp	r22, r1
- 5b2:	71 05       	cpc	r23, r1
- 5b4:	d9 f0       	breq	.+54     	; 0x5ec <rb_get+0x42>
- 5b6:	22 81       	ldd	r18, Z+2	; 0x02
- 5b8:	33 81       	ldd	r19, Z+3	; 0x03
- 5ba:	84 81       	ldd	r24, Z+4	; 0x04
- 5bc:	95 81       	ldd	r25, Z+5	; 0x05
- 5be:	28 17       	cp	r18, r24
- 5c0:	39 07       	cpc	r19, r25
- 5c2:	b1 f0       	breq	.+44     	; 0x5f0 <rb_get+0x46>
+ 700:	89 2b       	or	r24, r25
+ 702:	e1 f0       	breq	.+56     	; 0x73c <rb_get+0x3e>
+ 704:	61 15       	cp	r22, r1
+ 706:	71 05       	cpc	r23, r1
+ 708:	d9 f0       	breq	.+54     	; 0x740 <rb_get+0x42>
+ 70a:	22 81       	ldd	r18, Z+2	; 0x02
+ 70c:	33 81       	ldd	r19, Z+3	; 0x03
+ 70e:	84 81       	ldd	r24, Z+4	; 0x04
+ 710:	95 81       	ldd	r25, Z+5	; 0x05
+ 712:	28 17       	cp	r18, r24
+ 714:	39 07       	cpc	r19, r25
+ 716:	b1 f0       	breq	.+44     	; 0x744 <rb_get+0x46>
 		*data = rb->buffer[rb->tail];
- 5c4:	a0 81       	ld	r26, Z
- 5c6:	b1 81       	ldd	r27, Z+1	; 0x01
- 5c8:	a8 0f       	add	r26, r24
- 5ca:	b9 1f       	adc	r27, r25
- 5cc:	8c 91       	ld	r24, X
- 5ce:	db 01       	movw	r26, r22
- 5d0:	8c 93       	st	X, r24
+ 718:	a0 81       	ld	r26, Z
+ 71a:	b1 81       	ldd	r27, Z+1	; 0x01
+ 71c:	a8 0f       	add	r26, r24
+ 71e:	b9 1f       	adc	r27, r25
+ 720:	8c 91       	ld	r24, X
+ 722:	db 01       	movw	r26, r22
+ 724:	8c 93       	st	X, r24
 		rb->tail = (rb->tail + 1) % rb->size;
- 5d2:	84 81       	ldd	r24, Z+4	; 0x04
- 5d4:	95 81       	ldd	r25, Z+5	; 0x05
- 5d6:	01 96       	adiw	r24, 0x01	; 1
- 5d8:	66 81       	ldd	r22, Z+6	; 0x06
- 5da:	77 81       	ldd	r23, Z+7	; 0x07
- 5dc:	0e 94 9d 03 	call	0x73a	; 0x73a <__udivmodhi4>
- 5e0:	84 83       	std	Z+4, r24	; 0x04
- 5e2:	95 83       	std	Z+5, r25	; 0x05
+ 726:	84 81       	ldd	r24, Z+4	; 0x04
+ 728:	95 81       	ldd	r25, Z+5	; 0x05
+ 72a:	01 96       	adiw	r24, 0x01	; 1
+ 72c:	66 81       	ldd	r22, Z+6	; 0x06
+ 72e:	77 81       	ldd	r23, Z+7	; 0x07
+ 730:	0e 94 5a 04 	call	0x8b4	; 0x8b4 <__udivmodhi4>
+ 734:	84 83       	std	Z+4, r24	; 0x04
+ 736:	95 83       	std	Z+5, r25	; 0x05
 		return 1;
- 5e4:	81 e0       	ldi	r24, 0x01	; 1
- 5e6:	08 95       	ret
+ 738:	81 e0       	ldi	r24, 0x01	; 1
+ 73a:	08 95       	ret
 	} else {
 		return 0;
- 5e8:	80 e0       	ldi	r24, 0x00	; 0
- 5ea:	08 95       	ret
- 5ec:	80 e0       	ldi	r24, 0x00	; 0
- 5ee:	08 95       	ret
- 5f0:	80 e0       	ldi	r24, 0x00	; 0
+ 73c:	80 e0       	ldi	r24, 0x00	; 0
+ 73e:	08 95       	ret
+ 740:	80 e0       	ldi	r24, 0x00	; 0
+ 742:	08 95       	ret
+ 744:	80 e0       	ldi	r24, 0x00	; 0
 	}
 }
- 5f2:	08 95       	ret
+ 746:	08 95       	ret
 
-000005f4 <tp_new>:
+00000748 <tp_new>:
  */ 
 
 #include "tinyport.h"
 #include <util/delay.h>
 
 tinyport_t tp_new(USART_t *uart, PORT_t *port, uint8_t pinRX_bm, uint8_t pinTX_bm, uint8_t pinSTAT_bm){
- 5f4:	cf 92       	push	r12
- 5f6:	df 92       	push	r13
- 5f8:	ef 92       	push	r14
- 5fa:	0f 93       	push	r16
- 5fc:	cf 93       	push	r28
- 5fe:	df 93       	push	r29
- 600:	cd b7       	in	r28, 0x3d	; 61
- 602:	de b7       	in	r29, 0x3e	; 62
- 604:	6b 97       	sbiw	r28, 0x1b	; 27
- 606:	cd bf       	out	0x3d, r28	; 61
- 608:	de bf       	out	0x3e, r29	; 62
- 60a:	6c 01       	movw	r12, r24
+ 748:	cf 92       	push	r12
+ 74a:	df 92       	push	r13
+ 74c:	ef 92       	push	r14
+ 74e:	0f 93       	push	r16
+ 750:	cf 93       	push	r28
+ 752:	df 93       	push	r29
+ 754:	cd b7       	in	r28, 0x3d	; 61
+ 756:	de b7       	in	r29, 0x3e	; 62
+ 758:	6b 97       	sbiw	r28, 0x1b	; 27
+ 75a:	cd bf       	out	0x3d, r28	; 61
+ 75c:	de bf       	out	0x3e, r29	; 62
+ 75e:	6c 01       	movw	r12, r24
 	
 	tinyport_t tp;
 	
 	tp.uart = uart;
- 60c:	69 83       	std	Y+1, r22	; 0x01
- 60e:	7a 83       	std	Y+2, r23	; 0x02
+ 760:	69 83       	std	Y+1, r22	; 0x01
+ 762:	7a 83       	std	Y+2, r23	; 0x02
 	tp.port = port;
- 610:	4b 83       	std	Y+3, r20	; 0x03
- 612:	5c 83       	std	Y+4, r21	; 0x04
+ 764:	4b 83       	std	Y+3, r20	; 0x03
+ 766:	5c 83       	std	Y+4, r21	; 0x04
 	
 	tp.pinRX_bm = pinRX_bm;
- 614:	2d 83       	std	Y+5, r18	; 0x05
+ 768:	2d 83       	std	Y+5, r18	; 0x05
 	tp.pinTX_bm = pinTX_bm;
- 616:	0e 83       	std	Y+6, r16	; 0x06
+ 76a:	0e 83       	std	Y+6, r16	; 0x06
 	tp.pinSTAT_bm = pinSTAT_bm;
- 618:	ef 82       	std	Y+7, r14	; 0x07
+ 76c:	ef 82       	std	Y+7, r14	; 0x07
 	
 	tp.txstate = TP_TX_STATE_EMPTY;
- 61a:	18 86       	std	Y+8, r1	; 0x08
+ 76e:	18 86       	std	Y+8, r1	; 0x08
 	tp.rxstate = TP_RX_STATE_EMPTY;
- 61c:	19 86       	std	Y+9, r1	; 0x09
+ 770:	19 86       	std	Y+9, r1	; 0x09
 	tp.pstate = TP_PSTATE_OUTSIDE;
- 61e:	1a 86       	std	Y+10, r1	; 0x0a
+ 772:	1a 86       	std	Y+10, r1	; 0x0a
 	
 	rb_init(&tp.rbrx, TP_RXBUF_SIZE);
- 620:	60 e8       	ldi	r22, 0x80	; 128
- 622:	70 e0       	ldi	r23, 0x00	; 0
- 624:	ce 01       	movw	r24, r28
- 626:	0c 96       	adiw	r24, 0x0c	; 12
- 628:	0e 94 9f 02 	call	0x53e	; 0x53e <rb_init>
+ 774:	60 e8       	ldi	r22, 0x80	; 128
+ 776:	70 e0       	ldi	r23, 0x00	; 0
+ 778:	ce 01       	movw	r24, r28
+ 77a:	0c 96       	adiw	r24, 0x0c	; 12
+ 77c:	0e 94 49 03 	call	0x692	; 0x692 <rb_init>
 	rb_init(&tp.rbtx, TP_TXBUF_SIZE);
- 62c:	60 e8       	ldi	r22, 0x80	; 128
- 62e:	70 e0       	ldi	r23, 0x00	; 0
- 630:	ce 01       	movw	r24, r28
- 632:	44 96       	adiw	r24, 0x14	; 20
- 634:	0e 94 9f 02 	call	0x53e	; 0x53e <rb_init>
+ 780:	60 e8       	ldi	r22, 0x80	; 128
+ 782:	70 e0       	ldi	r23, 0x00	; 0
+ 784:	ce 01       	movw	r24, r28
+ 786:	44 96       	adiw	r24, 0x14	; 20
+ 788:	0e 94 49 03 	call	0x692	; 0x692 <rb_init>
 	
 	return tp;
- 638:	8b e1       	ldi	r24, 0x1B	; 27
- 63a:	fe 01       	movw	r30, r28
- 63c:	31 96       	adiw	r30, 0x01	; 1
- 63e:	d6 01       	movw	r26, r12
- 640:	01 90       	ld	r0, Z+
- 642:	0d 92       	st	X+, r0
- 644:	8a 95       	dec	r24
- 646:	e1 f7       	brne	.-8      	; 0x640 <tp_new+0x4c>
+ 78c:	8b e1       	ldi	r24, 0x1B	; 27
+ 78e:	fe 01       	movw	r30, r28
+ 790:	31 96       	adiw	r30, 0x01	; 1
+ 792:	d6 01       	movw	r26, r12
+ 794:	01 90       	ld	r0, Z+
+ 796:	0d 92       	st	X+, r0
+ 798:	8a 95       	dec	r24
+ 79a:	e1 f7       	brne	.-8      	; 0x794 <tp_new+0x4c>
 }
- 648:	c6 01       	movw	r24, r12
- 64a:	6b 96       	adiw	r28, 0x1b	; 27
- 64c:	cd bf       	out	0x3d, r28	; 61
- 64e:	de bf       	out	0x3e, r29	; 62
- 650:	df 91       	pop	r29
- 652:	cf 91       	pop	r28
- 654:	0f 91       	pop	r16
- 656:	ef 90       	pop	r14
- 658:	df 90       	pop	r13
- 65a:	cf 90       	pop	r12
- 65c:	08 95       	ret
+ 79c:	c6 01       	movw	r24, r12
+ 79e:	6b 96       	adiw	r28, 0x1b	; 27
+ 7a0:	cd bf       	out	0x3d, r28	; 61
+ 7a2:	de bf       	out	0x3e, r29	; 62
+ 7a4:	df 91       	pop	r29
+ 7a6:	cf 91       	pop	r28
+ 7a8:	0f 91       	pop	r16
+ 7aa:	ef 90       	pop	r14
+ 7ac:	df 90       	pop	r13
+ 7ae:	cf 90       	pop	r12
+ 7b0:	08 95       	ret
 
-0000065e <tp_init>:
+000007b2 <tp_init>:
 
 // mostly, start the uart port
 void tp_init(tinyport_t *tp){
- 65e:	fc 01       	movw	r30, r24
+ 7b2:	fc 01       	movw	r30, r24
 	// USART is in UART (async) mode automatically
 	// these registers setup the baudrate - the bitrate
 	// this seems a bit tricky. I am taking for granted that the clock is at 48MHz,
 	tp->uart->BAUDCTRLA = TP_UART_BAUDCONTROLA;
- 660:	a0 81       	ld	r26, Z
- 662:	b1 81       	ldd	r27, Z+1	; 0x01
- 664:	8b e9       	ldi	r24, 0x9B	; 155
- 666:	16 96       	adiw	r26, 0x06	; 6
- 668:	8c 93       	st	X, r24
+ 7b4:	a0 81       	ld	r26, Z
+ 7b6:	b1 81       	ldd	r27, Z+1	; 0x01
+ 7b8:	82 e0       	ldi	r24, 0x02	; 2
+ 7ba:	16 96       	adiw	r26, 0x06	; 6
+ 7bc:	8c 93       	st	X, r24
 	tp->uart->BAUDCTRLB = TP_UART_BAUDCONTROLB;
- 66a:	a0 81       	ld	r26, Z
- 66c:	b1 81       	ldd	r27, Z+1	; 0x01
- 66e:	17 96       	adiw	r26, 0x07	; 7
- 670:	1c 92       	st	X, r1
+ 7be:	a0 81       	ld	r26, Z
+ 7c0:	b1 81       	ldd	r27, Z+1	; 0x01
+ 7c2:	17 96       	adiw	r26, 0x07	; 7
+ 7c4:	1c 92       	st	X, r1
 	
 	// setup for interrupt
 	// receive complete interrupt low level, transmit complete interupt off, transmit buffer empty interupt off
 	tp->uart->CTRLA |= USART_RXCINTLVL_LO_gc | USART_TXCINTLVL_OFF_gc | USART_DREINTLVL_OFF_gc;
- 672:	a0 81       	ld	r26, Z
- 674:	b1 81       	ldd	r27, Z+1	; 0x01
- 676:	13 96       	adiw	r26, 0x03	; 3
- 678:	8c 91       	ld	r24, X
- 67a:	13 97       	sbiw	r26, 0x03	; 3
- 67c:	80 61       	ori	r24, 0x10	; 16
- 67e:	13 96       	adiw	r26, 0x03	; 3
- 680:	8c 93       	st	X, r24
+ 7c6:	a0 81       	ld	r26, Z
+ 7c8:	b1 81       	ldd	r27, Z+1	; 0x01
+ 7ca:	13 96       	adiw	r26, 0x03	; 3
+ 7cc:	8c 91       	ld	r24, X
+ 7ce:	13 97       	sbiw	r26, 0x03	; 3
+ 7d0:	80 61       	ori	r24, 0x10	; 16
+ 7d2:	13 96       	adiw	r26, 0x03	; 3
+ 7d4:	8c 93       	st	X, r24
 
 	// enables tx and rx
 	tp->uart->CTRLB = USART_TXEN_bm | USART_RXEN_bm;
- 682:	a0 81       	ld	r26, Z
- 684:	b1 81       	ldd	r27, Z+1	; 0x01
- 686:	88 e1       	ldi	r24, 0x18	; 24
- 688:	14 96       	adiw	r26, 0x04	; 4
- 68a:	8c 93       	st	X, r24
+ 7d6:	a0 81       	ld	r26, Z
+ 7d8:	b1 81       	ldd	r27, Z+1	; 0x01
+ 7da:	88 e1       	ldi	r24, 0x18	; 24
+ 7dc:	14 96       	adiw	r26, 0x04	; 4
+ 7de:	8c 93       	st	X, r24
 	
 	// setup mode
 	tp->uart->CTRLC = USART_CMODE_ASYNCHRONOUS_gc | USART_PMODE_DISABLED_gc | USART_CHSIZE_8BIT_gc; // 8 bit word, async, no parity bit}
- 68c:	a0 81       	ld	r26, Z
- 68e:	b1 81       	ldd	r27, Z+1	; 0x01
- 690:	83 e0       	ldi	r24, 0x03	; 3
- 692:	15 96       	adiw	r26, 0x05	; 5
- 694:	8c 93       	st	X, r24
+ 7e0:	a0 81       	ld	r26, Z
+ 7e2:	b1 81       	ldd	r27, Z+1	; 0x01
+ 7e4:	83 e0       	ldi	r24, 0x03	; 3
+ 7e6:	15 96       	adiw	r26, 0x05	; 5
+ 7e8:	8c 93       	st	X, r24
 	
 	// some GPIO setup, to agree with the UART peripheral
 	// tx pin (pin mapping is in the 'Datasheet', registers etc are in the 'Manual') these are default pins
 	tp->port->OUTSET = tp->pinTX_bm;
- 696:	a2 81       	ldd	r26, Z+2	; 0x02
- 698:	b3 81       	ldd	r27, Z+3	; 0x03
- 69a:	85 81       	ldd	r24, Z+5	; 0x05
- 69c:	15 96       	adiw	r26, 0x05	; 5
- 69e:	8c 93       	st	X, r24
+ 7ea:	a2 81       	ldd	r26, Z+2	; 0x02
+ 7ec:	b3 81       	ldd	r27, Z+3	; 0x03
+ 7ee:	85 81       	ldd	r24, Z+5	; 0x05
+ 7f0:	15 96       	adiw	r26, 0x05	; 5
+ 7f2:	8c 93       	st	X, r24
 	tp->port->DIRSET = tp->pinTX_bm;
- 6a0:	a2 81       	ldd	r26, Z+2	; 0x02
- 6a2:	b3 81       	ldd	r27, Z+3	; 0x03
- 6a4:	85 81       	ldd	r24, Z+5	; 0x05
- 6a6:	11 96       	adiw	r26, 0x01	; 1
- 6a8:	8c 93       	st	X, r24
+ 7f4:	a2 81       	ldd	r26, Z+2	; 0x02
+ 7f6:	b3 81       	ldd	r27, Z+3	; 0x03
+ 7f8:	85 81       	ldd	r24, Z+5	; 0x05
+ 7fa:	11 96       	adiw	r26, 0x01	; 1
+ 7fc:	8c 93       	st	X, r24
 	// rx pin
 	tp->port->DIRCLR = tp->pinRX_bm;
- 6aa:	a2 81       	ldd	r26, Z+2	; 0x02
- 6ac:	b3 81       	ldd	r27, Z+3	; 0x03
- 6ae:	84 81       	ldd	r24, Z+4	; 0x04
- 6b0:	12 96       	adiw	r26, 0x02	; 2
- 6b2:	8c 93       	st	X, r24
+ 7fe:	a2 81       	ldd	r26, Z+2	; 0x02
+ 800:	b3 81       	ldd	r27, Z+3	; 0x03
+ 802:	84 81       	ldd	r24, Z+4	; 0x04
+ 804:	12 96       	adiw	r26, 0x02	; 2
+ 806:	8c 93       	st	X, r24
 	tp->port->OUTCLR = tp->pinRX_bm;
- 6b4:	a2 81       	ldd	r26, Z+2	; 0x02
- 6b6:	b3 81       	ldd	r27, Z+3	; 0x03
- 6b8:	84 81       	ldd	r24, Z+4	; 0x04
- 6ba:	16 96       	adiw	r26, 0x06	; 6
- 6bc:	8c 93       	st	X, r24
+ 808:	a2 81       	ldd	r26, Z+2	; 0x02
+ 80a:	b3 81       	ldd	r27, Z+3	; 0x03
+ 80c:	84 81       	ldd	r24, Z+4	; 0x04
+ 80e:	16 96       	adiw	r26, 0x06	; 6
+ 810:	8c 93       	st	X, r24
 	// stat pin
 	tp->port->DIRSET = tp->pinSTAT_bm;
- 6be:	a2 81       	ldd	r26, Z+2	; 0x02
- 6c0:	b3 81       	ldd	r27, Z+3	; 0x03
- 6c2:	86 81       	ldd	r24, Z+6	; 0x06
- 6c4:	11 96       	adiw	r26, 0x01	; 1
- 6c6:	8c 93       	st	X, r24
- 6c8:	08 95       	ret
+ 812:	a2 81       	ldd	r26, Z+2	; 0x02
+ 814:	b3 81       	ldd	r27, Z+3	; 0x03
+ 816:	86 81       	ldd	r24, Z+6	; 0x06
+ 818:	11 96       	adiw	r26, 0x01	; 1
+ 81a:	8c 93       	st	X, r24
+ 81c:	08 95       	ret
 
-000006ca <tp_rxISR>:
+0000081e <tp_rxISR>:
 }
 
 void tp_rxISR(tinyport_t *tp){ // towards a passalong
- 6ca:	fc 01       	movw	r30, r24
-	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (this is blocking)
+ 81e:	fc 01       	movw	r30, r24
+	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (needs work a better way)
 	tp->uart->DATA = data;
 }
 
 void tp_statflash(tinyport_t *tp){
 	tp->port->OUTTGL = tp->pinSTAT_bm;
- 6cc:	a2 81       	ldd	r26, Z+2	; 0x02
- 6ce:	b3 81       	ldd	r27, Z+3	; 0x03
- 6d0:	86 81       	ldd	r24, Z+6	; 0x06
- 6d2:	17 96       	adiw	r26, 0x07	; 7
- 6d4:	8c 93       	st	X, r24
+ 820:	a2 81       	ldd	r26, Z+2	; 0x02
+ 822:	b3 81       	ldd	r27, Z+3	; 0x03
+ 824:	86 81       	ldd	r24, Z+6	; 0x06
+ 826:	17 96       	adiw	r26, 0x07	; 7
+ 828:	8c 93       	st	X, r24
 }
 
 void tp_rxISR(tinyport_t *tp){ // towards a passalong
 	tp_statflash(tp);
 	
 	tp->bumpdata = tp->uart->DATA;
- 6d6:	a0 81       	ld	r26, Z
- 6d8:	b1 81       	ldd	r27, Z+1	; 0x01
- 6da:	6c 91       	ld	r22, X
- 6dc:	62 87       	std	Z+10, r22	; 0x0a
+ 82a:	a0 81       	ld	r26, Z
+ 82c:	b1 81       	ldd	r27, Z+1	; 0x01
+ 82e:	6c 91       	ld	r22, X
+ 830:	62 87       	std	Z+10, r22	; 0x0a
 	
 	switch (tp->pstate){
- 6de:	81 85       	ldd	r24, Z+9	; 0x09
- 6e0:	88 23       	and	r24, r24
- 6e2:	19 f0       	breq	.+6      	; 0x6ea <tp_rxISR+0x20>
- 6e4:	81 30       	cpi	r24, 0x01	; 1
- 6e6:	31 f0       	breq	.+12     	; 0x6f4 <tp_rxISR+0x2a>
- 6e8:	08 95       	ret
-		
+ 832:	81 85       	ldd	r24, Z+9	; 0x09
+ 834:	88 23       	and	r24, r24
+ 836:	19 f0       	breq	.+6      	; 0x83e <tp_rxISR+0x20>
+ 838:	81 30       	cpi	r24, 0x01	; 1
+ 83a:	31 f0       	breq	.+12     	; 0x848 <tp_rxISR+0x2a>
+ 83c:	08 95       	ret
 		case TP_PSTATE_OUTSIDE:
 			if(tp->bumpdata == 126){
- 6ea:	6e 37       	cpi	r22, 0x7E	; 126
- 6ec:	59 f4       	brne	.+22     	; 0x704 <tp_rxISR+0x3a>
+ 83e:	6e 37       	cpi	r22, 0x7E	; 126
+ 840:	61 f4       	brne	.+24     	; 0x85a <tp_rxISR+0x3c>
 				tp->pstate = TP_PSTATE_INSIDE;
- 6ee:	81 e0       	ldi	r24, 0x01	; 1
- 6f0:	81 87       	std	Z+9, r24	; 0x09
- 6f2:	08 95       	ret
+ 842:	81 e0       	ldi	r24, 0x01	; 1
+ 844:	81 87       	std	Z+9, r24	; 0x09
+ 846:	08 95       	ret
 			}
 			break;
-			
 		case TP_PSTATE_INSIDE:
 			if(tp->bumpdata == 126){
- 6f4:	6e 37       	cpi	r22, 0x7E	; 126
- 6f6:	11 f4       	brne	.+4      	; 0x6fc <tp_rxISR+0x32>
-				tp->pstate = TP_PSTATE_OUTSIDE;
- 6f8:	11 86       	std	Z+9, r1	; 0x09
- 6fa:	08 95       	ret
- 6fc:	cf 01       	movw	r24, r30
+ 848:	6e 37       	cpi	r22, 0x7E	; 126
+ 84a:	19 f4       	brne	.+6      	; 0x852 <tp_rxISR+0x34>
+				tp->pstate = TP_PSTATE_HASPACKET;
+ 84c:	82 e0       	ldi	r24, 0x02	; 2
+ 84e:	81 87       	std	Z+9, r24	; 0x09
+ 850:	08 95       	ret
+ 852:	cf 01       	movw	r24, r30
 			} else {
 				rb_put(&tp->rbrx, tp->bumpdata);
- 6fe:	0b 96       	adiw	r24, 0x0b	; 11
- 700:	0e 94 b0 02 	call	0x560	; 0x560 <rb_put>
- 704:	08 95       	ret
+ 854:	0b 96       	adiw	r24, 0x0b	; 11
+ 856:	0e 94 5a 03 	call	0x6b4	; 0x6b4 <rb_put>
+ 85a:	08 95       	ret
 
-00000706 <tp_read>:
-		break;	
+0000085c <tp_read>:
+			break;	
 	}
 }
 
 uint8_t tp_read(tinyport_t *tp, uint8_t *data){ // TODO: set at pointer, return true if non empty
 	if(rb_get(&tp->rbrx, data)){
- 706:	0b 96       	adiw	r24, 0x0b	; 11
- 708:	0e 94 d5 02 	call	0x5aa	; 0x5aa <rb_get>
- 70c:	91 e0       	ldi	r25, 0x01	; 1
- 70e:	81 11       	cpse	r24, r1
- 710:	01 c0       	rjmp	.+2      	; 0x714 <tp_read+0xe>
- 712:	90 e0       	ldi	r25, 0x00	; 0
+ 85c:	0b 96       	adiw	r24, 0x0b	; 11
+ 85e:	0e 94 7f 03 	call	0x6fe	; 0x6fe <rb_get>
+ 862:	91 e0       	ldi	r25, 0x01	; 1
+ 864:	81 11       	cpse	r24, r1
+ 866:	01 c0       	rjmp	.+2      	; 0x86a <tp_read+0xe>
+ 868:	90 e0       	ldi	r25, 0x00	; 0
 		return 1;
 	} else {
 		return 0;
 	}
 }
- 714:	89 2f       	mov	r24, r25
- 716:	08 95       	ret
+ 86a:	89 2f       	mov	r24, r25
+ 86c:	08 95       	ret
 
-00000718 <tp_write>:
+0000086e <tp_write>:
 
 // https://lost-contact.mit.edu/afs/sur5r.net/service/drivers+doc/Atmel/ATXMEGA/AVR1307/code/doxygen/usart__driver_8c.html#7fdb922f6b858bef8515e23229efd970
 
 void tp_write(tinyport_t *tp, uint8_t data){
-	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (this is blocking)
- 718:	dc 01       	movw	r26, r24
- 71a:	ed 91       	ld	r30, X+
- 71c:	fc 91       	ld	r31, X
- 71e:	81 81       	ldd	r24, Z+1	; 0x01
- 720:	85 ff       	sbrs	r24, 5
- 722:	fd cf       	rjmp	.-6      	; 0x71e <tp_write+0x6>
+	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (needs work a better way)
+ 86e:	dc 01       	movw	r26, r24
+ 870:	ed 91       	ld	r30, X+
+ 872:	fc 91       	ld	r31, X
+ 874:	81 81       	ldd	r24, Z+1	; 0x01
+ 876:	85 ff       	sbrs	r24, 5
+ 878:	fd cf       	rjmp	.-6      	; 0x874 <tp_write+0x6>
 	tp->uart->DATA = data;
- 724:	60 83       	st	Z, r22
- 726:	08 95       	ret
+ 87a:	60 83       	st	Z, r22
+ 87c:	08 95       	ret
 
-00000728 <tp_statflash>:
+0000087e <tp_statflash>:
 }
 
 void tp_statflash(tinyport_t *tp){
 	tp->port->OUTTGL = tp->pinSTAT_bm;
- 728:	dc 01       	movw	r26, r24
- 72a:	12 96       	adiw	r26, 0x02	; 2
- 72c:	ed 91       	ld	r30, X+
- 72e:	fc 91       	ld	r31, X
- 730:	13 97       	sbiw	r26, 0x03	; 3
- 732:	16 96       	adiw	r26, 0x06	; 6
- 734:	8c 91       	ld	r24, X
- 736:	87 83       	std	Z+7, r24	; 0x07
- 738:	08 95       	ret
+ 87e:	dc 01       	movw	r26, r24
+ 880:	12 96       	adiw	r26, 0x02	; 2
+ 882:	ed 91       	ld	r30, X+
+ 884:	fc 91       	ld	r31, X
+ 886:	13 97       	sbiw	r26, 0x03	; 3
+ 888:	16 96       	adiw	r26, 0x06	; 6
+ 88a:	8c 91       	ld	r24, X
+ 88c:	87 83       	std	Z+7, r24	; 0x07
+ 88e:	08 95       	ret
+
+00000890 <tp_stathi>:
+}
+
+void tp_stathi(tinyport_t *tp){
+	tp->port->OUTSET = tp->pinSTAT_bm;
+ 890:	dc 01       	movw	r26, r24
+ 892:	12 96       	adiw	r26, 0x02	; 2
+ 894:	ed 91       	ld	r30, X+
+ 896:	fc 91       	ld	r31, X
+ 898:	13 97       	sbiw	r26, 0x03	; 3
+ 89a:	16 96       	adiw	r26, 0x06	; 6
+ 89c:	8c 91       	ld	r24, X
+ 89e:	85 83       	std	Z+5, r24	; 0x05
+ 8a0:	08 95       	ret
+
+000008a2 <tp_statlo>:
+}
+
+void tp_statlo(tinyport_t *tp){
+	tp->port->OUTCLR = tp->pinSTAT_bm;
+ 8a2:	dc 01       	movw	r26, r24
+ 8a4:	12 96       	adiw	r26, 0x02	; 2
+ 8a6:	ed 91       	ld	r30, X+
+ 8a8:	fc 91       	ld	r31, X
+ 8aa:	13 97       	sbiw	r26, 0x03	; 3
+ 8ac:	16 96       	adiw	r26, 0x06	; 6
+ 8ae:	8c 91       	ld	r24, X
+ 8b0:	86 83       	std	Z+6, r24	; 0x06
+ 8b2:	08 95       	ret
 
-0000073a <__udivmodhi4>:
- 73a:	aa 1b       	sub	r26, r26
- 73c:	bb 1b       	sub	r27, r27
- 73e:	51 e1       	ldi	r21, 0x11	; 17
- 740:	07 c0       	rjmp	.+14     	; 0x750 <__udivmodhi4_ep>
+000008b4 <__udivmodhi4>:
+ 8b4:	aa 1b       	sub	r26, r26
+ 8b6:	bb 1b       	sub	r27, r27
+ 8b8:	51 e1       	ldi	r21, 0x11	; 17
+ 8ba:	07 c0       	rjmp	.+14     	; 0x8ca <__udivmodhi4_ep>
 
-00000742 <__udivmodhi4_loop>:
- 742:	aa 1f       	adc	r26, r26
- 744:	bb 1f       	adc	r27, r27
- 746:	a6 17       	cp	r26, r22
- 748:	b7 07       	cpc	r27, r23
- 74a:	10 f0       	brcs	.+4      	; 0x750 <__udivmodhi4_ep>
- 74c:	a6 1b       	sub	r26, r22
- 74e:	b7 0b       	sbc	r27, r23
+000008bc <__udivmodhi4_loop>:
+ 8bc:	aa 1f       	adc	r26, r26
+ 8be:	bb 1f       	adc	r27, r27
+ 8c0:	a6 17       	cp	r26, r22
+ 8c2:	b7 07       	cpc	r27, r23
+ 8c4:	10 f0       	brcs	.+4      	; 0x8ca <__udivmodhi4_ep>
+ 8c6:	a6 1b       	sub	r26, r22
+ 8c8:	b7 0b       	sbc	r27, r23
 
-00000750 <__udivmodhi4_ep>:
- 750:	88 1f       	adc	r24, r24
- 752:	99 1f       	adc	r25, r25
- 754:	5a 95       	dec	r21
- 756:	a9 f7       	brne	.-22     	; 0x742 <__udivmodhi4_loop>
- 758:	80 95       	com	r24
- 75a:	90 95       	com	r25
- 75c:	bc 01       	movw	r22, r24
- 75e:	cd 01       	movw	r24, r26
- 760:	08 95       	ret
+000008ca <__udivmodhi4_ep>:
+ 8ca:	88 1f       	adc	r24, r24
+ 8cc:	99 1f       	adc	r25, r25
+ 8ce:	5a 95       	dec	r21
+ 8d0:	a9 f7       	brne	.-22     	; 0x8bc <__udivmodhi4_loop>
+ 8d2:	80 95       	com	r24
+ 8d4:	90 95       	com	r25
+ 8d6:	bc 01       	movw	r22, r24
+ 8d8:	cd 01       	movw	r24, r26
+ 8da:	08 95       	ret
 
-00000762 <malloc>:
- 762:	0f 93       	push	r16
- 764:	1f 93       	push	r17
- 766:	cf 93       	push	r28
- 768:	df 93       	push	r29
- 76a:	82 30       	cpi	r24, 0x02	; 2
- 76c:	91 05       	cpc	r25, r1
- 76e:	10 f4       	brcc	.+4      	; 0x774 <malloc+0x12>
- 770:	82 e0       	ldi	r24, 0x02	; 2
- 772:	90 e0       	ldi	r25, 0x00	; 0
- 774:	e0 91 74 20 	lds	r30, 0x2074	; 0x802074 <__flp>
- 778:	f0 91 75 20 	lds	r31, 0x2075	; 0x802075 <__flp+0x1>
- 77c:	20 e0       	ldi	r18, 0x00	; 0
- 77e:	30 e0       	ldi	r19, 0x00	; 0
- 780:	a0 e0       	ldi	r26, 0x00	; 0
- 782:	b0 e0       	ldi	r27, 0x00	; 0
- 784:	30 97       	sbiw	r30, 0x00	; 0
- 786:	19 f1       	breq	.+70     	; 0x7ce <malloc+0x6c>
- 788:	40 81       	ld	r20, Z
- 78a:	51 81       	ldd	r21, Z+1	; 0x01
- 78c:	02 81       	ldd	r16, Z+2	; 0x02
- 78e:	13 81       	ldd	r17, Z+3	; 0x03
- 790:	48 17       	cp	r20, r24
- 792:	59 07       	cpc	r21, r25
- 794:	c8 f0       	brcs	.+50     	; 0x7c8 <malloc+0x66>
- 796:	84 17       	cp	r24, r20
- 798:	95 07       	cpc	r25, r21
- 79a:	69 f4       	brne	.+26     	; 0x7b6 <malloc+0x54>
- 79c:	10 97       	sbiw	r26, 0x00	; 0
- 79e:	31 f0       	breq	.+12     	; 0x7ac <malloc+0x4a>
- 7a0:	12 96       	adiw	r26, 0x02	; 2
- 7a2:	0c 93       	st	X, r16
- 7a4:	12 97       	sbiw	r26, 0x02	; 2
- 7a6:	13 96       	adiw	r26, 0x03	; 3
- 7a8:	1c 93       	st	X, r17
- 7aa:	27 c0       	rjmp	.+78     	; 0x7fa <malloc+0x98>
- 7ac:	00 93 74 20 	sts	0x2074, r16	; 0x802074 <__flp>
- 7b0:	10 93 75 20 	sts	0x2075, r17	; 0x802075 <__flp+0x1>
- 7b4:	22 c0       	rjmp	.+68     	; 0x7fa <malloc+0x98>
- 7b6:	21 15       	cp	r18, r1
- 7b8:	31 05       	cpc	r19, r1
- 7ba:	19 f0       	breq	.+6      	; 0x7c2 <malloc+0x60>
- 7bc:	42 17       	cp	r20, r18
- 7be:	53 07       	cpc	r21, r19
- 7c0:	18 f4       	brcc	.+6      	; 0x7c8 <malloc+0x66>
- 7c2:	9a 01       	movw	r18, r20
- 7c4:	bd 01       	movw	r22, r26
- 7c6:	ef 01       	movw	r28, r30
- 7c8:	df 01       	movw	r26, r30
- 7ca:	f8 01       	movw	r30, r16
- 7cc:	db cf       	rjmp	.-74     	; 0x784 <malloc+0x22>
- 7ce:	21 15       	cp	r18, r1
- 7d0:	31 05       	cpc	r19, r1
- 7d2:	f9 f0       	breq	.+62     	; 0x812 <malloc+0xb0>
- 7d4:	28 1b       	sub	r18, r24
- 7d6:	39 0b       	sbc	r19, r25
- 7d8:	24 30       	cpi	r18, 0x04	; 4
- 7da:	31 05       	cpc	r19, r1
- 7dc:	80 f4       	brcc	.+32     	; 0x7fe <malloc+0x9c>
- 7de:	8a 81       	ldd	r24, Y+2	; 0x02
- 7e0:	9b 81       	ldd	r25, Y+3	; 0x03
- 7e2:	61 15       	cp	r22, r1
- 7e4:	71 05       	cpc	r23, r1
- 7e6:	21 f0       	breq	.+8      	; 0x7f0 <malloc+0x8e>
- 7e8:	fb 01       	movw	r30, r22
- 7ea:	82 83       	std	Z+2, r24	; 0x02
- 7ec:	93 83       	std	Z+3, r25	; 0x03
- 7ee:	04 c0       	rjmp	.+8      	; 0x7f8 <malloc+0x96>
- 7f0:	80 93 74 20 	sts	0x2074, r24	; 0x802074 <__flp>
- 7f4:	90 93 75 20 	sts	0x2075, r25	; 0x802075 <__flp+0x1>
- 7f8:	fe 01       	movw	r30, r28
- 7fa:	32 96       	adiw	r30, 0x02	; 2
- 7fc:	44 c0       	rjmp	.+136    	; 0x886 <malloc+0x124>
- 7fe:	fe 01       	movw	r30, r28
- 800:	e2 0f       	add	r30, r18
- 802:	f3 1f       	adc	r31, r19
- 804:	81 93       	st	Z+, r24
- 806:	91 93       	st	Z+, r25
- 808:	22 50       	subi	r18, 0x02	; 2
- 80a:	31 09       	sbc	r19, r1
- 80c:	28 83       	st	Y, r18
- 80e:	39 83       	std	Y+1, r19	; 0x01
- 810:	3a c0       	rjmp	.+116    	; 0x886 <malloc+0x124>
- 812:	20 91 72 20 	lds	r18, 0x2072	; 0x802072 <__brkval>
- 816:	30 91 73 20 	lds	r19, 0x2073	; 0x802073 <__brkval+0x1>
- 81a:	23 2b       	or	r18, r19
- 81c:	41 f4       	brne	.+16     	; 0x82e <malloc+0xcc>
- 81e:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <__malloc_heap_start>
- 822:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <__malloc_heap_start+0x1>
- 826:	20 93 72 20 	sts	0x2072, r18	; 0x802072 <__brkval>
- 82a:	30 93 73 20 	sts	0x2073, r19	; 0x802073 <__brkval+0x1>
- 82e:	20 91 00 20 	lds	r18, 0x2000	; 0x802000 <__data_start>
- 832:	30 91 01 20 	lds	r19, 0x2001	; 0x802001 <__data_start+0x1>
- 836:	21 15       	cp	r18, r1
- 838:	31 05       	cpc	r19, r1
- 83a:	41 f4       	brne	.+16     	; 0x84c <malloc+0xea>
- 83c:	2d b7       	in	r18, 0x3d	; 61
- 83e:	3e b7       	in	r19, 0x3e	; 62
- 840:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <__malloc_margin>
- 844:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <__malloc_margin+0x1>
- 848:	24 1b       	sub	r18, r20
- 84a:	35 0b       	sbc	r19, r21
- 84c:	e0 91 72 20 	lds	r30, 0x2072	; 0x802072 <__brkval>
- 850:	f0 91 73 20 	lds	r31, 0x2073	; 0x802073 <__brkval+0x1>
- 854:	e2 17       	cp	r30, r18
- 856:	f3 07       	cpc	r31, r19
- 858:	a0 f4       	brcc	.+40     	; 0x882 <malloc+0x120>
- 85a:	2e 1b       	sub	r18, r30
- 85c:	3f 0b       	sbc	r19, r31
- 85e:	28 17       	cp	r18, r24
- 860:	39 07       	cpc	r19, r25
- 862:	78 f0       	brcs	.+30     	; 0x882 <malloc+0x120>
- 864:	ac 01       	movw	r20, r24
- 866:	4e 5f       	subi	r20, 0xFE	; 254
- 868:	5f 4f       	sbci	r21, 0xFF	; 255
- 86a:	24 17       	cp	r18, r20
- 86c:	35 07       	cpc	r19, r21
- 86e:	48 f0       	brcs	.+18     	; 0x882 <malloc+0x120>
- 870:	4e 0f       	add	r20, r30
- 872:	5f 1f       	adc	r21, r31
- 874:	40 93 72 20 	sts	0x2072, r20	; 0x802072 <__brkval>
- 878:	50 93 73 20 	sts	0x2073, r21	; 0x802073 <__brkval+0x1>
- 87c:	81 93       	st	Z+, r24
- 87e:	91 93       	st	Z+, r25
- 880:	02 c0       	rjmp	.+4      	; 0x886 <malloc+0x124>
- 882:	e0 e0       	ldi	r30, 0x00	; 0
- 884:	f0 e0       	ldi	r31, 0x00	; 0
- 886:	cf 01       	movw	r24, r30
- 888:	df 91       	pop	r29
- 88a:	cf 91       	pop	r28
- 88c:	1f 91       	pop	r17
- 88e:	0f 91       	pop	r16
- 890:	08 95       	ret
+000008dc <malloc>:
+ 8dc:	0f 93       	push	r16
+ 8de:	1f 93       	push	r17
+ 8e0:	cf 93       	push	r28
+ 8e2:	df 93       	push	r29
+ 8e4:	82 30       	cpi	r24, 0x02	; 2
+ 8e6:	91 05       	cpc	r25, r1
+ 8e8:	10 f4       	brcc	.+4      	; 0x8ee <malloc+0x12>
+ 8ea:	82 e0       	ldi	r24, 0x02	; 2
+ 8ec:	90 e0       	ldi	r25, 0x00	; 0
+ 8ee:	e0 91 c1 20 	lds	r30, 0x20C1	; 0x8020c1 <__flp>
+ 8f2:	f0 91 c2 20 	lds	r31, 0x20C2	; 0x8020c2 <__flp+0x1>
+ 8f6:	20 e0       	ldi	r18, 0x00	; 0
+ 8f8:	30 e0       	ldi	r19, 0x00	; 0
+ 8fa:	a0 e0       	ldi	r26, 0x00	; 0
+ 8fc:	b0 e0       	ldi	r27, 0x00	; 0
+ 8fe:	30 97       	sbiw	r30, 0x00	; 0
+ 900:	19 f1       	breq	.+70     	; 0x948 <malloc+0x6c>
+ 902:	40 81       	ld	r20, Z
+ 904:	51 81       	ldd	r21, Z+1	; 0x01
+ 906:	02 81       	ldd	r16, Z+2	; 0x02
+ 908:	13 81       	ldd	r17, Z+3	; 0x03
+ 90a:	48 17       	cp	r20, r24
+ 90c:	59 07       	cpc	r21, r25
+ 90e:	c8 f0       	brcs	.+50     	; 0x942 <malloc+0x66>
+ 910:	84 17       	cp	r24, r20
+ 912:	95 07       	cpc	r25, r21
+ 914:	69 f4       	brne	.+26     	; 0x930 <malloc+0x54>
+ 916:	10 97       	sbiw	r26, 0x00	; 0
+ 918:	31 f0       	breq	.+12     	; 0x926 <malloc+0x4a>
+ 91a:	12 96       	adiw	r26, 0x02	; 2
+ 91c:	0c 93       	st	X, r16
+ 91e:	12 97       	sbiw	r26, 0x02	; 2
+ 920:	13 96       	adiw	r26, 0x03	; 3
+ 922:	1c 93       	st	X, r17
+ 924:	27 c0       	rjmp	.+78     	; 0x974 <malloc+0x98>
+ 926:	00 93 c1 20 	sts	0x20C1, r16	; 0x8020c1 <__flp>
+ 92a:	10 93 c2 20 	sts	0x20C2, r17	; 0x8020c2 <__flp+0x1>
+ 92e:	22 c0       	rjmp	.+68     	; 0x974 <malloc+0x98>
+ 930:	21 15       	cp	r18, r1
+ 932:	31 05       	cpc	r19, r1
+ 934:	19 f0       	breq	.+6      	; 0x93c <malloc+0x60>
+ 936:	42 17       	cp	r20, r18
+ 938:	53 07       	cpc	r21, r19
+ 93a:	18 f4       	brcc	.+6      	; 0x942 <malloc+0x66>
+ 93c:	9a 01       	movw	r18, r20
+ 93e:	bd 01       	movw	r22, r26
+ 940:	ef 01       	movw	r28, r30
+ 942:	df 01       	movw	r26, r30
+ 944:	f8 01       	movw	r30, r16
+ 946:	db cf       	rjmp	.-74     	; 0x8fe <malloc+0x22>
+ 948:	21 15       	cp	r18, r1
+ 94a:	31 05       	cpc	r19, r1
+ 94c:	f9 f0       	breq	.+62     	; 0x98c <malloc+0xb0>
+ 94e:	28 1b       	sub	r18, r24
+ 950:	39 0b       	sbc	r19, r25
+ 952:	24 30       	cpi	r18, 0x04	; 4
+ 954:	31 05       	cpc	r19, r1
+ 956:	80 f4       	brcc	.+32     	; 0x978 <malloc+0x9c>
+ 958:	8a 81       	ldd	r24, Y+2	; 0x02
+ 95a:	9b 81       	ldd	r25, Y+3	; 0x03
+ 95c:	61 15       	cp	r22, r1
+ 95e:	71 05       	cpc	r23, r1
+ 960:	21 f0       	breq	.+8      	; 0x96a <malloc+0x8e>
+ 962:	fb 01       	movw	r30, r22
+ 964:	82 83       	std	Z+2, r24	; 0x02
+ 966:	93 83       	std	Z+3, r25	; 0x03
+ 968:	04 c0       	rjmp	.+8      	; 0x972 <malloc+0x96>
+ 96a:	80 93 c1 20 	sts	0x20C1, r24	; 0x8020c1 <__flp>
+ 96e:	90 93 c2 20 	sts	0x20C2, r25	; 0x8020c2 <__flp+0x1>
+ 972:	fe 01       	movw	r30, r28
+ 974:	32 96       	adiw	r30, 0x02	; 2
+ 976:	44 c0       	rjmp	.+136    	; 0xa00 <malloc+0x124>
+ 978:	fe 01       	movw	r30, r28
+ 97a:	e2 0f       	add	r30, r18
+ 97c:	f3 1f       	adc	r31, r19
+ 97e:	81 93       	st	Z+, r24
+ 980:	91 93       	st	Z+, r25
+ 982:	22 50       	subi	r18, 0x02	; 2
+ 984:	31 09       	sbc	r19, r1
+ 986:	28 83       	st	Y, r18
+ 988:	39 83       	std	Y+1, r19	; 0x01
+ 98a:	3a c0       	rjmp	.+116    	; 0xa00 <malloc+0x124>
+ 98c:	20 91 bf 20 	lds	r18, 0x20BF	; 0x8020bf <__brkval>
+ 990:	30 91 c0 20 	lds	r19, 0x20C0	; 0x8020c0 <__brkval+0x1>
+ 994:	23 2b       	or	r18, r19
+ 996:	41 f4       	brne	.+16     	; 0x9a8 <malloc+0xcc>
+ 998:	20 91 02 20 	lds	r18, 0x2002	; 0x802002 <__malloc_heap_start>
+ 99c:	30 91 03 20 	lds	r19, 0x2003	; 0x802003 <__malloc_heap_start+0x1>
+ 9a0:	20 93 bf 20 	sts	0x20BF, r18	; 0x8020bf <__brkval>
+ 9a4:	30 93 c0 20 	sts	0x20C0, r19	; 0x8020c0 <__brkval+0x1>
+ 9a8:	20 91 00 20 	lds	r18, 0x2000	; 0x802000 <__data_start>
+ 9ac:	30 91 01 20 	lds	r19, 0x2001	; 0x802001 <__data_start+0x1>
+ 9b0:	21 15       	cp	r18, r1
+ 9b2:	31 05       	cpc	r19, r1
+ 9b4:	41 f4       	brne	.+16     	; 0x9c6 <malloc+0xea>
+ 9b6:	2d b7       	in	r18, 0x3d	; 61
+ 9b8:	3e b7       	in	r19, 0x3e	; 62
+ 9ba:	40 91 04 20 	lds	r20, 0x2004	; 0x802004 <__malloc_margin>
+ 9be:	50 91 05 20 	lds	r21, 0x2005	; 0x802005 <__malloc_margin+0x1>
+ 9c2:	24 1b       	sub	r18, r20
+ 9c4:	35 0b       	sbc	r19, r21
+ 9c6:	e0 91 bf 20 	lds	r30, 0x20BF	; 0x8020bf <__brkval>
+ 9ca:	f0 91 c0 20 	lds	r31, 0x20C0	; 0x8020c0 <__brkval+0x1>
+ 9ce:	e2 17       	cp	r30, r18
+ 9d0:	f3 07       	cpc	r31, r19
+ 9d2:	a0 f4       	brcc	.+40     	; 0x9fc <malloc+0x120>
+ 9d4:	2e 1b       	sub	r18, r30
+ 9d6:	3f 0b       	sbc	r19, r31
+ 9d8:	28 17       	cp	r18, r24
+ 9da:	39 07       	cpc	r19, r25
+ 9dc:	78 f0       	brcs	.+30     	; 0x9fc <malloc+0x120>
+ 9de:	ac 01       	movw	r20, r24
+ 9e0:	4e 5f       	subi	r20, 0xFE	; 254
+ 9e2:	5f 4f       	sbci	r21, 0xFF	; 255
+ 9e4:	24 17       	cp	r18, r20
+ 9e6:	35 07       	cpc	r19, r21
+ 9e8:	48 f0       	brcs	.+18     	; 0x9fc <malloc+0x120>
+ 9ea:	4e 0f       	add	r20, r30
+ 9ec:	5f 1f       	adc	r21, r31
+ 9ee:	40 93 bf 20 	sts	0x20BF, r20	; 0x8020bf <__brkval>
+ 9f2:	50 93 c0 20 	sts	0x20C0, r21	; 0x8020c0 <__brkval+0x1>
+ 9f6:	81 93       	st	Z+, r24
+ 9f8:	91 93       	st	Z+, r25
+ 9fa:	02 c0       	rjmp	.+4      	; 0xa00 <malloc+0x124>
+ 9fc:	e0 e0       	ldi	r30, 0x00	; 0
+ 9fe:	f0 e0       	ldi	r31, 0x00	; 0
+ a00:	cf 01       	movw	r24, r30
+ a02:	df 91       	pop	r29
+ a04:	cf 91       	pop	r28
+ a06:	1f 91       	pop	r17
+ a08:	0f 91       	pop	r16
+ a0a:	08 95       	ret
 
-00000892 <free>:
- 892:	cf 93       	push	r28
- 894:	df 93       	push	r29
- 896:	00 97       	sbiw	r24, 0x00	; 0
- 898:	09 f4       	brne	.+2      	; 0x89c <free+0xa>
- 89a:	81 c0       	rjmp	.+258    	; 0x99e <free+0x10c>
- 89c:	fc 01       	movw	r30, r24
- 89e:	32 97       	sbiw	r30, 0x02	; 2
- 8a0:	12 82       	std	Z+2, r1	; 0x02
- 8a2:	13 82       	std	Z+3, r1	; 0x03
- 8a4:	a0 91 74 20 	lds	r26, 0x2074	; 0x802074 <__flp>
- 8a8:	b0 91 75 20 	lds	r27, 0x2075	; 0x802075 <__flp+0x1>
- 8ac:	10 97       	sbiw	r26, 0x00	; 0
- 8ae:	81 f4       	brne	.+32     	; 0x8d0 <free+0x3e>
- 8b0:	20 81       	ld	r18, Z
- 8b2:	31 81       	ldd	r19, Z+1	; 0x01
- 8b4:	82 0f       	add	r24, r18
- 8b6:	93 1f       	adc	r25, r19
- 8b8:	20 91 72 20 	lds	r18, 0x2072	; 0x802072 <__brkval>
- 8bc:	30 91 73 20 	lds	r19, 0x2073	; 0x802073 <__brkval+0x1>
- 8c0:	28 17       	cp	r18, r24
- 8c2:	39 07       	cpc	r19, r25
- 8c4:	51 f5       	brne	.+84     	; 0x91a <free+0x88>
- 8c6:	e0 93 72 20 	sts	0x2072, r30	; 0x802072 <__brkval>
- 8ca:	f0 93 73 20 	sts	0x2073, r31	; 0x802073 <__brkval+0x1>
- 8ce:	67 c0       	rjmp	.+206    	; 0x99e <free+0x10c>
- 8d0:	ed 01       	movw	r28, r26
- 8d2:	20 e0       	ldi	r18, 0x00	; 0
- 8d4:	30 e0       	ldi	r19, 0x00	; 0
- 8d6:	ce 17       	cp	r28, r30
- 8d8:	df 07       	cpc	r29, r31
- 8da:	40 f4       	brcc	.+16     	; 0x8ec <free+0x5a>
- 8dc:	4a 81       	ldd	r20, Y+2	; 0x02
- 8de:	5b 81       	ldd	r21, Y+3	; 0x03
- 8e0:	9e 01       	movw	r18, r28
- 8e2:	41 15       	cp	r20, r1
- 8e4:	51 05       	cpc	r21, r1
- 8e6:	f1 f0       	breq	.+60     	; 0x924 <free+0x92>
- 8e8:	ea 01       	movw	r28, r20
- 8ea:	f5 cf       	rjmp	.-22     	; 0x8d6 <free+0x44>
- 8ec:	c2 83       	std	Z+2, r28	; 0x02
- 8ee:	d3 83       	std	Z+3, r29	; 0x03
- 8f0:	40 81       	ld	r20, Z
- 8f2:	51 81       	ldd	r21, Z+1	; 0x01
- 8f4:	84 0f       	add	r24, r20
- 8f6:	95 1f       	adc	r25, r21
- 8f8:	c8 17       	cp	r28, r24
- 8fa:	d9 07       	cpc	r29, r25
- 8fc:	59 f4       	brne	.+22     	; 0x914 <free+0x82>
- 8fe:	88 81       	ld	r24, Y
- 900:	99 81       	ldd	r25, Y+1	; 0x01
- 902:	84 0f       	add	r24, r20
- 904:	95 1f       	adc	r25, r21
- 906:	02 96       	adiw	r24, 0x02	; 2
- 908:	80 83       	st	Z, r24
- 90a:	91 83       	std	Z+1, r25	; 0x01
- 90c:	8a 81       	ldd	r24, Y+2	; 0x02
- 90e:	9b 81       	ldd	r25, Y+3	; 0x03
- 910:	82 83       	std	Z+2, r24	; 0x02
- 912:	93 83       	std	Z+3, r25	; 0x03
- 914:	21 15       	cp	r18, r1
- 916:	31 05       	cpc	r19, r1
- 918:	29 f4       	brne	.+10     	; 0x924 <free+0x92>
- 91a:	e0 93 74 20 	sts	0x2074, r30	; 0x802074 <__flp>
- 91e:	f0 93 75 20 	sts	0x2075, r31	; 0x802075 <__flp+0x1>
- 922:	3d c0       	rjmp	.+122    	; 0x99e <free+0x10c>
- 924:	e9 01       	movw	r28, r18
- 926:	ea 83       	std	Y+2, r30	; 0x02
- 928:	fb 83       	std	Y+3, r31	; 0x03
- 92a:	49 91       	ld	r20, Y+
- 92c:	59 91       	ld	r21, Y+
- 92e:	c4 0f       	add	r28, r20
- 930:	d5 1f       	adc	r29, r21
- 932:	ec 17       	cp	r30, r28
- 934:	fd 07       	cpc	r31, r29
- 936:	61 f4       	brne	.+24     	; 0x950 <free+0xbe>
- 938:	80 81       	ld	r24, Z
- 93a:	91 81       	ldd	r25, Z+1	; 0x01
- 93c:	84 0f       	add	r24, r20
- 93e:	95 1f       	adc	r25, r21
- 940:	02 96       	adiw	r24, 0x02	; 2
- 942:	e9 01       	movw	r28, r18
- 944:	88 83       	st	Y, r24
- 946:	99 83       	std	Y+1, r25	; 0x01
- 948:	82 81       	ldd	r24, Z+2	; 0x02
- 94a:	93 81       	ldd	r25, Z+3	; 0x03
- 94c:	8a 83       	std	Y+2, r24	; 0x02
- 94e:	9b 83       	std	Y+3, r25	; 0x03
- 950:	e0 e0       	ldi	r30, 0x00	; 0
- 952:	f0 e0       	ldi	r31, 0x00	; 0
- 954:	12 96       	adiw	r26, 0x02	; 2
- 956:	8d 91       	ld	r24, X+
- 958:	9c 91       	ld	r25, X
- 95a:	13 97       	sbiw	r26, 0x03	; 3
- 95c:	00 97       	sbiw	r24, 0x00	; 0
- 95e:	19 f0       	breq	.+6      	; 0x966 <free+0xd4>
- 960:	fd 01       	movw	r30, r26
- 962:	dc 01       	movw	r26, r24
- 964:	f7 cf       	rjmp	.-18     	; 0x954 <free+0xc2>
- 966:	8d 91       	ld	r24, X+
- 968:	9c 91       	ld	r25, X
- 96a:	11 97       	sbiw	r26, 0x01	; 1
- 96c:	9d 01       	movw	r18, r26
- 96e:	2e 5f       	subi	r18, 0xFE	; 254
- 970:	3f 4f       	sbci	r19, 0xFF	; 255
- 972:	82 0f       	add	r24, r18
- 974:	93 1f       	adc	r25, r19
- 976:	20 91 72 20 	lds	r18, 0x2072	; 0x802072 <__brkval>
- 97a:	30 91 73 20 	lds	r19, 0x2073	; 0x802073 <__brkval+0x1>
- 97e:	28 17       	cp	r18, r24
- 980:	39 07       	cpc	r19, r25
- 982:	69 f4       	brne	.+26     	; 0x99e <free+0x10c>
- 984:	30 97       	sbiw	r30, 0x00	; 0
- 986:	29 f4       	brne	.+10     	; 0x992 <free+0x100>
- 988:	10 92 74 20 	sts	0x2074, r1	; 0x802074 <__flp>
- 98c:	10 92 75 20 	sts	0x2075, r1	; 0x802075 <__flp+0x1>
- 990:	02 c0       	rjmp	.+4      	; 0x996 <free+0x104>
- 992:	12 82       	std	Z+2, r1	; 0x02
- 994:	13 82       	std	Z+3, r1	; 0x03
- 996:	a0 93 72 20 	sts	0x2072, r26	; 0x802072 <__brkval>
- 99a:	b0 93 73 20 	sts	0x2073, r27	; 0x802073 <__brkval+0x1>
- 99e:	df 91       	pop	r29
- 9a0:	cf 91       	pop	r28
- 9a2:	08 95       	ret
+00000a0c <free>:
+ a0c:	cf 93       	push	r28
+ a0e:	df 93       	push	r29
+ a10:	00 97       	sbiw	r24, 0x00	; 0
+ a12:	09 f4       	brne	.+2      	; 0xa16 <free+0xa>
+ a14:	81 c0       	rjmp	.+258    	; 0xb18 <free+0x10c>
+ a16:	fc 01       	movw	r30, r24
+ a18:	32 97       	sbiw	r30, 0x02	; 2
+ a1a:	12 82       	std	Z+2, r1	; 0x02
+ a1c:	13 82       	std	Z+3, r1	; 0x03
+ a1e:	a0 91 c1 20 	lds	r26, 0x20C1	; 0x8020c1 <__flp>
+ a22:	b0 91 c2 20 	lds	r27, 0x20C2	; 0x8020c2 <__flp+0x1>
+ a26:	10 97       	sbiw	r26, 0x00	; 0
+ a28:	81 f4       	brne	.+32     	; 0xa4a <free+0x3e>
+ a2a:	20 81       	ld	r18, Z
+ a2c:	31 81       	ldd	r19, Z+1	; 0x01
+ a2e:	82 0f       	add	r24, r18
+ a30:	93 1f       	adc	r25, r19
+ a32:	20 91 bf 20 	lds	r18, 0x20BF	; 0x8020bf <__brkval>
+ a36:	30 91 c0 20 	lds	r19, 0x20C0	; 0x8020c0 <__brkval+0x1>
+ a3a:	28 17       	cp	r18, r24
+ a3c:	39 07       	cpc	r19, r25
+ a3e:	51 f5       	brne	.+84     	; 0xa94 <free+0x88>
+ a40:	e0 93 bf 20 	sts	0x20BF, r30	; 0x8020bf <__brkval>
+ a44:	f0 93 c0 20 	sts	0x20C0, r31	; 0x8020c0 <__brkval+0x1>
+ a48:	67 c0       	rjmp	.+206    	; 0xb18 <free+0x10c>
+ a4a:	ed 01       	movw	r28, r26
+ a4c:	20 e0       	ldi	r18, 0x00	; 0
+ a4e:	30 e0       	ldi	r19, 0x00	; 0
+ a50:	ce 17       	cp	r28, r30
+ a52:	df 07       	cpc	r29, r31
+ a54:	40 f4       	brcc	.+16     	; 0xa66 <free+0x5a>
+ a56:	4a 81       	ldd	r20, Y+2	; 0x02
+ a58:	5b 81       	ldd	r21, Y+3	; 0x03
+ a5a:	9e 01       	movw	r18, r28
+ a5c:	41 15       	cp	r20, r1
+ a5e:	51 05       	cpc	r21, r1
+ a60:	f1 f0       	breq	.+60     	; 0xa9e <free+0x92>
+ a62:	ea 01       	movw	r28, r20
+ a64:	f5 cf       	rjmp	.-22     	; 0xa50 <free+0x44>
+ a66:	c2 83       	std	Z+2, r28	; 0x02
+ a68:	d3 83       	std	Z+3, r29	; 0x03
+ a6a:	40 81       	ld	r20, Z
+ a6c:	51 81       	ldd	r21, Z+1	; 0x01
+ a6e:	84 0f       	add	r24, r20
+ a70:	95 1f       	adc	r25, r21
+ a72:	c8 17       	cp	r28, r24
+ a74:	d9 07       	cpc	r29, r25
+ a76:	59 f4       	brne	.+22     	; 0xa8e <free+0x82>
+ a78:	88 81       	ld	r24, Y
+ a7a:	99 81       	ldd	r25, Y+1	; 0x01
+ a7c:	84 0f       	add	r24, r20
+ a7e:	95 1f       	adc	r25, r21
+ a80:	02 96       	adiw	r24, 0x02	; 2
+ a82:	80 83       	st	Z, r24
+ a84:	91 83       	std	Z+1, r25	; 0x01
+ a86:	8a 81       	ldd	r24, Y+2	; 0x02
+ a88:	9b 81       	ldd	r25, Y+3	; 0x03
+ a8a:	82 83       	std	Z+2, r24	; 0x02
+ a8c:	93 83       	std	Z+3, r25	; 0x03
+ a8e:	21 15       	cp	r18, r1
+ a90:	31 05       	cpc	r19, r1
+ a92:	29 f4       	brne	.+10     	; 0xa9e <free+0x92>
+ a94:	e0 93 c1 20 	sts	0x20C1, r30	; 0x8020c1 <__flp>
+ a98:	f0 93 c2 20 	sts	0x20C2, r31	; 0x8020c2 <__flp+0x1>
+ a9c:	3d c0       	rjmp	.+122    	; 0xb18 <free+0x10c>
+ a9e:	e9 01       	movw	r28, r18
+ aa0:	ea 83       	std	Y+2, r30	; 0x02
+ aa2:	fb 83       	std	Y+3, r31	; 0x03
+ aa4:	49 91       	ld	r20, Y+
+ aa6:	59 91       	ld	r21, Y+
+ aa8:	c4 0f       	add	r28, r20
+ aaa:	d5 1f       	adc	r29, r21
+ aac:	ec 17       	cp	r30, r28
+ aae:	fd 07       	cpc	r31, r29
+ ab0:	61 f4       	brne	.+24     	; 0xaca <free+0xbe>
+ ab2:	80 81       	ld	r24, Z
+ ab4:	91 81       	ldd	r25, Z+1	; 0x01
+ ab6:	84 0f       	add	r24, r20
+ ab8:	95 1f       	adc	r25, r21
+ aba:	02 96       	adiw	r24, 0x02	; 2
+ abc:	e9 01       	movw	r28, r18
+ abe:	88 83       	st	Y, r24
+ ac0:	99 83       	std	Y+1, r25	; 0x01
+ ac2:	82 81       	ldd	r24, Z+2	; 0x02
+ ac4:	93 81       	ldd	r25, Z+3	; 0x03
+ ac6:	8a 83       	std	Y+2, r24	; 0x02
+ ac8:	9b 83       	std	Y+3, r25	; 0x03
+ aca:	e0 e0       	ldi	r30, 0x00	; 0
+ acc:	f0 e0       	ldi	r31, 0x00	; 0
+ ace:	12 96       	adiw	r26, 0x02	; 2
+ ad0:	8d 91       	ld	r24, X+
+ ad2:	9c 91       	ld	r25, X
+ ad4:	13 97       	sbiw	r26, 0x03	; 3
+ ad6:	00 97       	sbiw	r24, 0x00	; 0
+ ad8:	19 f0       	breq	.+6      	; 0xae0 <free+0xd4>
+ ada:	fd 01       	movw	r30, r26
+ adc:	dc 01       	movw	r26, r24
+ ade:	f7 cf       	rjmp	.-18     	; 0xace <free+0xc2>
+ ae0:	8d 91       	ld	r24, X+
+ ae2:	9c 91       	ld	r25, X
+ ae4:	11 97       	sbiw	r26, 0x01	; 1
+ ae6:	9d 01       	movw	r18, r26
+ ae8:	2e 5f       	subi	r18, 0xFE	; 254
+ aea:	3f 4f       	sbci	r19, 0xFF	; 255
+ aec:	82 0f       	add	r24, r18
+ aee:	93 1f       	adc	r25, r19
+ af0:	20 91 bf 20 	lds	r18, 0x20BF	; 0x8020bf <__brkval>
+ af4:	30 91 c0 20 	lds	r19, 0x20C0	; 0x8020c0 <__brkval+0x1>
+ af8:	28 17       	cp	r18, r24
+ afa:	39 07       	cpc	r19, r25
+ afc:	69 f4       	brne	.+26     	; 0xb18 <free+0x10c>
+ afe:	30 97       	sbiw	r30, 0x00	; 0
+ b00:	29 f4       	brne	.+10     	; 0xb0c <free+0x100>
+ b02:	10 92 c1 20 	sts	0x20C1, r1	; 0x8020c1 <__flp>
+ b06:	10 92 c2 20 	sts	0x20C2, r1	; 0x8020c2 <__flp+0x1>
+ b0a:	02 c0       	rjmp	.+4      	; 0xb10 <free+0x104>
+ b0c:	12 82       	std	Z+2, r1	; 0x02
+ b0e:	13 82       	std	Z+3, r1	; 0x03
+ b10:	a0 93 bf 20 	sts	0x20BF, r26	; 0x8020bf <__brkval>
+ b14:	b0 93 c0 20 	sts	0x20C0, r27	; 0x8020c0 <__brkval+0x1>
+ b18:	df 91       	pop	r29
+ b1a:	cf 91       	pop	r28
+ b1c:	08 95       	ret
 
-000009a4 <_exit>:
- 9a4:	f8 94       	cli
+00000b1e <_exit>:
+ b1e:	f8 94       	cli
 
-000009a6 <__stop_program>:
- 9a6:	ff cf       	rjmp	.-2      	; 0x9a6 <__stop_program>
+00000b20 <__stop_program>:
+ b20:	ff cf       	rjmp	.-2      	; 0xb20 <__stop_program>
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.map b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.map
index a8db06261d68e72db66095a4a36ffa83e3909501..4cbea04ead642a5b89030a8282c7314fa3185b64 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.map
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.map
@@ -4,20 +4,22 @@ c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/..
                               ringbuffer.o (__udivmodhi4)
 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
                               C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/gcc/dev/atxmega128a4u/avrxmega7/crtatxmega128a4u.o (exit)
-c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
-                              main.o (__do_copy_data)
 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
                               main.o (__do_clear_bss)
 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
                               ringbuffer.o (malloc)
+c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+                              c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o) (__do_copy_data)
 
 Allocating common symbols
 Common symbol       size              file
 
+tpacket2            0x7               main.o
 tp2                 0x1b              main.o
 tp1                 0x1b              main.o
 __brkval            0x2               c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
 tp4                 0x1b              main.o
+tpacket1            0x46              main.o
 __flp               0x2               c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
 tp3                 0x1b              main.o
 
@@ -28,13 +30,10 @@ Discarded input sections
  .text          0x00000000        0x0 main.o
  .data          0x00000000        0x0 main.o
  .bss           0x00000000        0x0 main.o
- .text.handoff  0x00000000        0x2 main.o
  .text.nointerrupts
                 0x00000000        0xc main.o
  .text.interrupts
                 0x00000000        0xc main.o
- .data.psize    0x00000000        0x1 main.o
- .bss.pcount    0x00000000        0x1 main.o
  .text          0x00000000        0x0 ringbuffer.o
  .data          0x00000000        0x0 ringbuffer.o
  .bss           0x00000000        0x0 ringbuffer.o
@@ -44,10 +43,6 @@ Discarded input sections
  .text          0x00000000        0x0 tinyport.o
  .data          0x00000000        0x0 tinyport.o
  .bss           0x00000000        0x0 tinyport.o
- .text.tp_stathi
-                0x00000000       0x12 tinyport.o
- .text.tp_statlo
-                0x00000000       0x12 tinyport.o
  .text.tp_test  0x00000000       0x3c tinyport.o
  .text          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_udivmodhi4.o)
  .data          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_udivmodhi4.o)
@@ -79,22 +74,6 @@ Discarded input sections
                 0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
  .text.libgcc.fixed
                 0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
- .text          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .data          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .bss           0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc.mul
-                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc.div
-                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc   0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc.prologue
-                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc.builtins
-                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc.fmul
-                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
- .text.libgcc.fixed
-                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
  .text          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
  .data          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
  .bss           0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
@@ -113,6 +92,22 @@ Discarded input sections
                 0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
  .text          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
  .bss           0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
+ .text          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .data          0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .bss           0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc.mul
+                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc.div
+                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc   0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc.prologue
+                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc.builtins
+                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc.fmul
+                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+ .text.libgcc.fixed
+                0x00000000        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
 
 Memory Configuration
 
@@ -239,7 +234,7 @@ END GROUP
 .rela.plt
  *(.rela.plt)
 
-.text           0x00000000      0x9a8
+.text           0x00000000      0xb22
  *(.vectors)
  .vectors       0x00000000      0x1fc C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/gcc/dev/atxmega128a4u/avrxmega7/crtatxmega128a4u.o
                 0x00000000                __vector_default
@@ -280,10 +275,10 @@ END GROUP
  *(.init3)
  *(.init3)
  *(.init4)
- .init4         0x00000214       0x1c c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
-                0x00000214                __do_copy_data
- .init4         0x00000230       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
-                0x00000230                __do_clear_bss
+ .init4         0x00000214       0x10 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_clear_bss.o)
+                0x00000214                __do_clear_bss
+ .init4         0x00000224       0x1c c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_copy_data.o)
+                0x00000224                __do_copy_data
  *(.init4)
  *(.init5)
  *(.init5)
@@ -423,56 +418,68 @@ END GROUP
                 0x00000248                __vector_120
                 0x0000024c                . = ALIGN (0x2)
  *(.text.*)
- .text.main     0x0000024c      0x134 main.o
-                0x0000024c                main
+ .text.testpacket1
+                0x0000024c       0x36 main.o
+                0x0000024c                testpacket1
+ .text.testpacket2
+                0x00000282       0x36 main.o
+                0x00000282                testpacket2
+ .text.main     0x000002b8      0x21c main.o
+                0x000002b8                main
  .text.__vector_25
-                0x00000380       0x6a main.o
-                0x00000380                __vector_25
+                0x000004d4       0x6a main.o
+                0x000004d4                __vector_25
  .text.__vector_28
-                0x000003ea       0x6a main.o
-                0x000003ea                __vector_28
+                0x0000053e       0x6a main.o
+                0x0000053e                __vector_28
  .text.__vector_88
-                0x00000454       0x6a main.o
-                0x00000454                __vector_88
+                0x000005a8       0x6a main.o
+                0x000005a8                __vector_88
  .text.__vector_91
-                0x000004be       0x6a main.o
-                0x000004be                __vector_91
+                0x00000612       0x6a main.o
+                0x00000612                __vector_91
  .text.rb_reset
-                0x00000528       0x16 ringbuffer.o
-                0x00000528                rb_reset
- .text.rb_init  0x0000053e       0x22 ringbuffer.o
-                0x0000053e                rb_init
- .text.rb_put   0x00000560       0x4a ringbuffer.o
-                0x00000560                rb_put
- .text.rb_get   0x000005aa       0x4a ringbuffer.o
-                0x000005aa                rb_get
- .text.tp_new   0x000005f4       0x6a tinyport.o
-                0x000005f4                tp_new
- .text.tp_init  0x0000065e       0x6c tinyport.o
-                0x0000065e                tp_init
+                0x0000067c       0x16 ringbuffer.o
+                0x0000067c                rb_reset
+ .text.rb_init  0x00000692       0x22 ringbuffer.o
+                0x00000692                rb_init
+ .text.rb_put   0x000006b4       0x4a ringbuffer.o
+                0x000006b4                rb_put
+ .text.rb_get   0x000006fe       0x4a ringbuffer.o
+                0x000006fe                rb_get
+ .text.tp_new   0x00000748       0x6a tinyport.o
+                0x00000748                tp_new
+ .text.tp_init  0x000007b2       0x6c tinyport.o
+                0x000007b2                tp_init
  .text.tp_rxISR
-                0x000006ca       0x3c tinyport.o
-                0x000006ca                tp_rxISR
- .text.tp_read  0x00000706       0x12 tinyport.o
-                0x00000706                tp_read
+                0x0000081e       0x3e tinyport.o
+                0x0000081e                tp_rxISR
+ .text.tp_read  0x0000085c       0x12 tinyport.o
+                0x0000085c                tp_read
  .text.tp_write
-                0x00000718       0x10 tinyport.o
-                0x00000718                tp_write
+                0x0000086e       0x10 tinyport.o
+                0x0000086e                tp_write
  .text.tp_statflash
-                0x00000728       0x12 tinyport.o
-                0x00000728                tp_statflash
+                0x0000087e       0x12 tinyport.o
+                0x0000087e                tp_statflash
+ .text.tp_stathi
+                0x00000890       0x12 tinyport.o
+                0x00000890                tp_stathi
+ .text.tp_statlo
+                0x000008a2       0x12 tinyport.o
+                0x000008a2                tp_statlo
  .text.libgcc.div
-                0x0000073a       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_udivmodhi4.o)
-                0x0000073a                __udivmodhi4
+                0x000008b4       0x28 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_udivmodhi4.o)
+                0x000008b4                __udivmodhi4
  .text.avr-libc
-                0x00000762      0x242 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
-                0x00000762                malloc
-                0x00000892                free
-                0x000009a4                . = ALIGN (0x2)
+                0x000008dc      0x242 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
+                0x000008dc                malloc
+                0x00000a0c                free
+                0x00000b1e                . = ALIGN (0x2)
  *(.fini9)
- .fini9         0x000009a4        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
-                0x000009a4                _exit
-                0x000009a4                exit
+ .fini9         0x00000b1e        0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
+                0x00000b1e                _exit
+                0x00000b1e                exit
  *(.fini9)
  *(.fini8)
  *(.fini8)
@@ -491,11 +498,11 @@ END GROUP
  *(.fini1)
  *(.fini1)
  *(.fini0)
- .fini0         0x000009a4        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
+ .fini0         0x00000b1e        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/avrxmega7\libgcc.a(_exit.o)
  *(.fini0)
-                0x000009a8                _etext = .
+                0x00000b22                _etext = .
 
-.data           0x00802000        0x6 load address 0x000009a8
+.data           0x00802000        0x6 load address 0x00000b22
                 0x00802000                PROVIDE (__data_start, .)
  *(.data)
  .data          0x00802000        0x6 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
@@ -510,29 +517,31 @@ END GROUP
                 0x00802006                _edata = .
                 0x00802006                PROVIDE (__data_end, .)
 
-.bss            0x00802006       0x70
+.bss            0x00802006       0xbd
                 0x00802006                PROVIDE (__bss_start, .)
  *(.bss)
  *(.bss*)
  *(COMMON)
- COMMON         0x00802006       0x6c main.o
-                0x00802006                tp2
-                0x00802021                tp1
-                0x0080203c                tp4
-                0x00802057                tp3
- COMMON         0x00802072        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
-                0x00802072                __brkval
-                0x00802074                __flp
-                0x00802076                PROVIDE (__bss_end, .)
-                0x000009a8                __data_load_start = LOADADDR (.data)
-                0x000009ae                __data_load_end = (__data_load_start + SIZEOF (.data))
-
-.noinit         0x00802076        0x0
+ COMMON         0x00802006       0xb9 main.o
+                0x00802006                tpacket2
+                0x0080200d                tp2
+                0x00802028                tp1
+                0x00802043                tp4
+                0x0080205e                tpacket1
+                0x008020a4                tp3
+ COMMON         0x008020bf        0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/5.4.0/../../../../avr/lib/avrxmega7\libc.a(malloc.o)
+                0x008020bf                __brkval
+                0x008020c1                __flp
+                0x008020c3                PROVIDE (__bss_end, .)
+                0x00000b22                __data_load_start = LOADADDR (.data)
+                0x00000b28                __data_load_end = (__data_load_start + SIZEOF (.data))
+
+.noinit         0x008020c3        0x0
                 [!provide]                PROVIDE (__noinit_start, .)
  *(.noinit*)
                 [!provide]                PROVIDE (__noinit_end, .)
-                0x00802076                _end = .
-                0x00802076                PROVIDE (__heap_start, .)
+                0x008020c3                _end = .
+                0x008020c3                PROVIDE (__heap_start, .)
 
 .eeprom         0x00810000        0x0
  *(.eeprom*)
@@ -599,60 +608,60 @@ END GROUP
 .debug_sfnames
  *(.debug_sfnames)
 
-.debug_aranges  0x00000000      0x100
+.debug_aranges  0x00000000      0x108
  *(.debug_aranges)
  .debug_aranges
-                0x00000000       0x58 main.o
+                0x00000000       0x60 main.o
  .debug_aranges
-                0x00000058       0x48 ringbuffer.o
+                0x00000060       0x48 ringbuffer.o
  .debug_aranges
-                0x000000a0       0x60 tinyport.o
+                0x000000a8       0x60 tinyport.o
 
 .debug_pubnames
  *(.debug_pubnames)
 
-.debug_info     0x00000000     0x3c5f
+.debug_info     0x00000000     0x3efe
  *(.debug_info .gnu.linkonce.wi.*)
  .debug_info    0x00000000     0x284f C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/gcc/dev/atxmega128a4u/avrxmega7/crtatxmega128a4u.o
- .debug_info    0x0000284f      0x9fa main.o
- .debug_info    0x00003249      0x25d ringbuffer.o
- .debug_info    0x000034a6      0x7b9 tinyport.o
+ .debug_info    0x0000284f      0xc99 main.o
+ .debug_info    0x000034e8      0x25d ringbuffer.o
+ .debug_info    0x00003745      0x7b9 tinyport.o
 
-.debug_abbrev   0x00000000     0x2add
+.debug_abbrev   0x00000000     0x2b5c
  *(.debug_abbrev)
  .debug_abbrev  0x00000000     0x262c C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/gcc/dev/atxmega128a4u/avrxmega7/crtatxmega128a4u.o
- .debug_abbrev  0x0000262c      0x1a3 main.o
- .debug_abbrev  0x000027cf      0x136 ringbuffer.o
- .debug_abbrev  0x00002905      0x1d8 tinyport.o
+ .debug_abbrev  0x0000262c      0x222 main.o
+ .debug_abbrev  0x0000284e      0x136 ringbuffer.o
+ .debug_abbrev  0x00002984      0x1d8 tinyport.o
 
-.debug_line     0x00000000      0xbd5
+.debug_line     0x00000000      0xd5f
  *(.debug_line .debug_line.* .debug_line_end)
  .debug_line    0x00000000      0x3b5 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/gcc/dev/atxmega128a4u/avrxmega7/crtatxmega128a4u.o
- .debug_line    0x000003b5      0x2b9 main.o
- .debug_line    0x0000066e      0x23f ringbuffer.o
- .debug_line    0x000008ad      0x328 tinyport.o
+ .debug_line    0x000003b5      0x443 main.o
+ .debug_line    0x000007f8      0x23f ringbuffer.o
+ .debug_line    0x00000a37      0x328 tinyport.o
 
-.debug_frame    0x00000000      0x32c
+.debug_frame    0x00000000      0x364
  *(.debug_frame)
- .debug_frame   0x00000000      0x1c4 main.o
- .debug_frame   0x000001c4       0xa0 ringbuffer.o
- .debug_frame   0x00000264       0xc8 tinyport.o
+ .debug_frame   0x00000000      0x1fc main.o
+ .debug_frame   0x000001fc       0xa0 ringbuffer.o
+ .debug_frame   0x0000029c       0xc8 tinyport.o
 
-.debug_str      0x00000000     0x22f6
+.debug_str      0x00000000     0x23f9
  *(.debug_str)
  .debug_str     0x00000000     0x1aa8 C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/XMEGAA_DFP/1.1.68/gcc/dev/atxmega128a4u/avrxmega7/crtatxmega128a4u.o
- .debug_str     0x00001aa8      0x551 main.o
-                                0x5ab (size before relaxing)
- .debug_str     0x00001ff9       0x49 ringbuffer.o
+ .debug_str     0x00001aa8      0x668 main.o
+                                0x6cf (size before relaxing)
+ .debug_str     0x00002110       0x49 ringbuffer.o
                                 0x207 (size before relaxing)
- .debug_str     0x00002042      0x2b4 tinyport.o
+ .debug_str     0x00002159      0x2a0 tinyport.o
                                 0x645 (size before relaxing)
 
-.debug_loc      0x00000000      0x92b
+.debug_loc      0x00000000      0xaed
  *(.debug_loc)
- .debug_loc     0x00000000      0x373 main.o
- .debug_loc     0x00000373      0x29b ringbuffer.o
- .debug_loc     0x0000060e      0x31d tinyport.o
+ .debug_loc     0x00000000      0x535 main.o
+ .debug_loc     0x00000535      0x29b ringbuffer.o
+ .debug_loc     0x000007d0      0x31d tinyport.o
 
 .debug_macinfo
  *(.debug_macinfo)
@@ -672,11 +681,11 @@ END GROUP
 .debug_pubtypes
  *(.debug_pubtypes)
 
-.debug_ranges   0x00000000       0xd0
+.debug_ranges   0x00000000       0xd8
  *(.debug_ranges)
- .debug_ranges  0x00000000       0x48 main.o
- .debug_ranges  0x00000048       0x38 ringbuffer.o
- .debug_ranges  0x00000080       0x50 tinyport.o
+ .debug_ranges  0x00000000       0x50 main.o
+ .debug_ranges  0x00000050       0x38 ringbuffer.o
+ .debug_ranges  0x00000088       0x50 tinyport.o
 
 .debug_macro
  *(.debug_macro)
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.srec b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.srec
index 1f16bf2eba3d3bebcb5cad71d142bcfcd2dda267..cd0f2e132055c409a1cdc62609b62229dc68161f 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.srec
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.srec
@@ -5,8 +5,8 @@ S11300200C9424010C9424010C9424010C942401B8
 S11300300C9424010C9424010C9424010C942401A8
 S11300400C9424010C9424010C9424010C94240198
 S11300500C9424010C9424010C9424010C94240188
-S11300600C9424010C94C0010C9424010C942401DC
-S11300700C94F5010C9424010C9424010C94240197
+S11300600C9424010C946A020C9424010C94240131
+S11300700C949F020C9424010C9424010C942401EC
 S11300800C9424010C9424010C9424010C94240158
 S11300900C9424010C9424010C9424010C94240148
 S11300A00C9424010C9424010C9424010C94240138
@@ -21,7 +21,7 @@ S11301200C9424010C9424010C9424010C942401B7
 S11301300C9424010C9424010C9424010C942401A7
 S11301400C9424010C9424010C9424010C94240197
 S11301500C9424010C9424010C9424010C94240187
-S11301600C942A020C9424010C9424010C945F0234
+S11301600C94D4020C9424010C9424010C940903DF
 S11301700C9424010C9424010C9424010C94240167
 S11301800C9424010C9424010C9424010C94240157
 S11301900C9424010C9424010C9424010C94240147
@@ -32,127 +32,151 @@ S11301D00C9424010C9424010C9424010C94240107
 S11301E00C9424010C9424010C9424010C942401F7
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diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/main.o b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/main.o
index e52ec26ba24cba5fed2866b0c3f0bc8bb3a3722c..d186a71f5ad7df80ae01a846abe229921782196b 100644
Binary files a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/main.o and b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/main.o differ
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/tinyport.o b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/tinyport.o
index 74ba40bff7328fc3e6bdf7c76a3dd359514a9027..755290bd723924aa819680739621480145a64c0c 100644
Binary files a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/tinyport.o and b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/tinyport.o differ
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/main.c b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/main.c
index 61a826005d898e7e85a1d8f53ddd2d75c0bfd2de..2060b2f3c21a6efbff0f66ded65c93bf003da2b6 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/main.c
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/main.c
@@ -27,6 +27,25 @@ tinyport_t tp2;
 tinyport_t tp3; //nhat used at the moment
 tinyport_t tp4;
 
+uint8_t tpacket1[70];
+uint8_t tpacket2[7];
+
+void testpacket1(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 70; i ++){
+		tp_write(&tp4, tpacket1[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
+void testpacket2(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 7; i ++){
+		tp_write(&tp4, tpacket2[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
 int main(void){
 	// Neil: overclocking (rad)
 	OSC.PLLCTRL = OSC_PLLFAC4_bm | OSC_PLLFAC3_bm; // 2 MHz * 24 = 48 MHz
@@ -38,7 +57,8 @@ int main(void){
 	// uart, port, rx, tx, stat
 	
 	tp1 = tp_new(&USARTC0, &PORTC, PIN2_bm, PIN3_bm, PIN4_bm);
-	tp_init(&tp1);
+	//tp_init(&tp1);
+	PORTC.DIRSET = PIN3_bm;
 	
 	tp2 = tp_new(&USARTC1, &PORTC, PIN6_bm, PIN7_bm, PIN5_bm); 
 	tp_init(&tp2);
@@ -49,6 +69,10 @@ int main(void){
 	tp4 = tp_new(&USARTD1, &PORTD, PIN6_bm, PIN7_bm, PIN5_bm);
 	tp_init(&tp4);
 	
+	PORTD.DIRCLR = PIN1_bm;
+	PORTD.DIRCLR = PIN0_bm; // button ready
+	PORTD.PIN1CTRL = PORT_OPC_PULLUP_gc;
+	PORTD.PIN0CTRL = PORT_OPC_PULLUP_gc;
 			
 	// system interrupt setup (allow low level interrupts)
 	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
@@ -56,28 +80,49 @@ int main(void){
 	// globally enable interrupts 
 	sei();
 	
+	tpacket1[0] = 126; // start delimiter
+	tpacket1[1] = 1; // destination address (this and lower)
+	tpacket1[2] = 2; // # edges from source
+	tpacket1[3] = 4; // source address
+	tpacket1[4] = 64; // # of bytes in payload
+	tpacket1[69] = 126;
+	
+	tpacket2[0] = 126; // start delimiter
+	tpacket2[6] = 126; // end delimiter
+	
+	uint8_t data;
+	
 	while(1){
-		uint8_t data;
 		tp_statflash(&tp1);
-		
-		if(tp_read(&tp2, &data)){
-			tp_statflash(&tp3);
-			tp_write(&tp4, data);
+		if(tp2.pstate == TP_PSTATE_HASPACKET){
+			tp_stathi(&tp3);
+			PORTC.OUTSET = PIN3_bm;
+			
+			tp_write(&tp4, 126);
+			while(tp_read(&tp2, &data)){
+				tp_write(&tp4, data);
+			}
+			tp_write(&tp4, 126);
+			
+			PORTC.OUTCLR = PIN3_bm;
+			tp_statlo(&tp3);
+			tp2.pstate = TP_PSTATE_OUTSIDE;
+		} else if (!(PORTD.IN & PIN1_bm)){
+			tp_stathi(&tp3);
+			testpacket1(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500); // basically, debounce button
+		} else if (!(PORTD.IN & PIN0_bm)) {
+			tp_stathi(&tp3);
+			testpacket2(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500);
 		}
 		
 		// the below only works when bounded by nointerrupts() and interrupts();
 	}
 }
 
-uint8_t pcount = 0;
-uint8_t psize = 12;
-
-// passing 2 -> 4
-
-void handoff(tinyport_t *tp_from){ // puts data in 'core' of system
-	//
-}
-
 /*
 turns off global interrupt control
 my understanding is that interrupts still get scheduled, but not executed
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.c b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.c
index 0a8747f9ec18437ab2fdb75cf875b533b46c31c6..e39961aa012b2f838698478a003b1151d7f0e559 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.c
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.c
@@ -71,7 +71,7 @@ void tp_rxISR(tinyport_t *tp){ // towards a passalong
 			break;
 		case TP_PSTATE_INSIDE:
 			if(tp->bumpdata == 126){
-				tp->pstate = TP_PSTATE_OUTSIDE;
+				tp->pstate = TP_PSTATE_HASPACKET;
 			} else {
 				rb_put(&tp->rbrx, tp->bumpdata);
 			}
@@ -92,7 +92,7 @@ uint8_t tp_read(tinyport_t *tp, uint8_t *data){ // TODO: set at pointer, return
 // https://lost-contact.mit.edu/afs/sur5r.net/service/drivers+doc/Atmel/ATXMEGA/AVR1307/code/doxygen/usart__driver_8c.html#7fdb922f6b858bef8515e23229efd970
 
 void tp_write(tinyport_t *tp, uint8_t data){
-	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (this is blocking)
+	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (needs work a better way)
 	tp->uart->DATA = data;
 }
 
diff --git a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.h b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.h
index 22ca10ceca899fe200d157eb3092a4d6bc020e63..e4fedc8938510b00387bceaea23f64447c046c69 100644
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.h
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.h
@@ -14,7 +14,7 @@
 #define TP_TXBUF_SIZE 128
 #define TP_RXBUF_SIZE 128
 #define TP_UART_BAUDCONTROLB 0
-#define TP_UART_BAUDCONTROLA 155 // 19200: 155, 1M: 2
+#define TP_UART_BAUDCONTROLA 2 // 19200: 155, 115200: 25, 230400: 12, 428600: 6, 1M: 2, 1.5M: 1, 3M: 0
 
 #define TP_RX_STATE_EMPTY 0
 #define TP_RX_STATE_HASDATA 1
@@ -24,6 +24,7 @@
 
 #define TP_PSTATE_OUTSIDE 0
 #define TP_PSTATE_INSIDE 1
+#define TP_PSTATE_HASPACKET 2 
 
 typedef struct {
 	USART_t *uart;
diff --git a/results/daisychain/daisychain-measurement.jpg b/results/daisychain/daisychain-measurement.jpg
new file mode 100644
index 0000000000000000000000000000000000000000..dc26c455bb218e028dfc0c685409065f2ab86292
Binary files /dev/null and b/results/daisychain/daisychain-measurement.jpg differ
diff --git a/results/daisychain/daisychain-setup.jpg b/results/daisychain/daisychain-setup.jpg
new file mode 100644
index 0000000000000000000000000000000000000000..5365fad67cf020e864558bf42f84432892ec6cc8
Binary files /dev/null and b/results/daisychain/daisychain-setup.jpg differ
diff --git a/results/daisychain/daisychain.md b/results/daisychain/daisychain.md
new file mode 100644
index 0000000000000000000000000000000000000000..40f18a68e2d1049f90ae880729ecaa81c098627c
--- /dev/null
+++ b/results/daisychain/daisychain.md
@@ -0,0 +1,28 @@
+# Daisy Chained Message Passing
+
+## Setup
+
+In this baseline test, our switches are connected in series. On receiving a packet on Port 2, it is automatically forwarded to Port 4, with no computation done otherwise. This will give us a baseline performance metric while developing algorithms that necessarily perform *some* computation with each packet before forwarding it, as well as handling messages on multiple ports, etc.
+
+![img of setup](https://github.com/jakeread/tinynets/blob/master/results/daisychain/daisychain-setup.jpg)  
+
+We test a packet that is 70 Bytes long - 560 bits and a packet that is 7 bytes long (our minimum). The code used to buffer and pass the message is included under /results/daisychain/code . Each switch sets a pin high during the interval that it is sending bytes, and we use a logic analyzer to track this status across multiple switches. This is how we measure message passing time.
+
+![img of logic](https://github.com/jakeread/tinynets/blob/master/results/daisychain/daisychain-measurement.jpg)  
+
+Results are as follows. The expected T_message is simply (bits/packet)/bitrate - any additional message time is due to system design and implementation. Critically, UART uses a start and stop bit, per byte.
+
+Bitrate | T_message (us) | P_size | T_message* (us) | % Difference
+--- | --- | --- | --- 
+115200 | 4861 | 70 | 5858 | 21
+115200 | 486 | 7 | 586 | 21
+230400 | 2431 | 70 | 2930 | 21 
+230400 | 243 | 7 | 295 | 21 
+428600 | 1307 | 70 | 1580 | 21 
+428600 | 131 | 7 | 161 | 23 
+1M | 560 | 70 | 679 | 21
+1M | 56 | 7 | 71 | 27
+3M | 187 | 70 | 245 | 31
+3M | 19 | 7 | 43 | 126
+
+Critically, we see a ~20% increase with lower bitrates - largely due to the extra two bits (start and stop) per packet. At higher bitrates, processor overhead also becomes apparent, nearly doubling message times. This is a key indicator that our system performance will hinge on driving switch computation to a minimum, an observation made in class...
diff --git a/results/daisychain/daisychain_19200.logicdata b/results/daisychain/daisychain_19200.logicdata
new file mode 100644
index 0000000000000000000000000000000000000000..d350aa8b2e7bc0f71895460948ecc0b02107224c
Binary files /dev/null and b/results/daisychain/daisychain_19200.logicdata differ
diff --git a/results/daisychain/src/main.c b/results/daisychain/src/main.c
new file mode 100644
index 0000000000000000000000000000000000000000..2060b2f3c21a6efbff0f66ded65c93bf003da2b6
--- /dev/null
+++ b/results/daisychain/src/main.c
@@ -0,0 +1,178 @@
+/*
+ * atxmega-a4u-wakeup.c
+ *
+ * Created: 10/19/2017 11:24:49 PM
+ * Author : Jake
+ */ 
+
+#define BUTTON1 0 // on port D
+#define BUTTON1_bm (1 << BUTTON1)
+#define BUTTON2 1 // on port D
+#define BUTTON2_bm (1 << BUTTON2)
+
+#define BLINK_DELAY_MS 500
+#define F_CPU 20000000UL // so that the system knows how many clock ticks are in one second, so that delay functions are accurate
+
+#define NEWLINE 0x0A
+
+#include <avr/io.h>
+#include <avr/interrupt.h> // NEED this for Interrupts - only to use sei() to enable global interrupt flag
+#include <util/delay.h>
+
+#include "ringbuffer.h"
+#include "tinyport.h"
+
+tinyport_t tp1; //power, at the moment
+tinyport_t tp2;
+tinyport_t tp3; //nhat used at the moment
+tinyport_t tp4;
+
+uint8_t tpacket1[70];
+uint8_t tpacket2[7];
+
+void testpacket1(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 70; i ++){
+		tp_write(&tp4, tpacket1[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
+void testpacket2(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 7; i ++){
+		tp_write(&tp4, tpacket2[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
+int main(void){
+	// Neil: overclocking (rad)
+	OSC.PLLCTRL = OSC_PLLFAC4_bm | OSC_PLLFAC3_bm; // 2 MHz * 24 = 48 MHz
+	OSC.CTRL = OSC_PLLEN_bm; // enable PLL
+	while (!(OSC.STATUS & OSC_PLLRDY_bm)); // wait for PLL to be ready
+	CCP = CCP_IOREG_gc; // enable protected register change
+	CLK.CTRL = CLK_SCLKSEL_PLL_gc; // switch to PLL
+		
+	// uart, port, rx, tx, stat
+	
+	tp1 = tp_new(&USARTC0, &PORTC, PIN2_bm, PIN3_bm, PIN4_bm);
+	//tp_init(&tp1);
+	PORTC.DIRSET = PIN3_bm;
+	
+	tp2 = tp_new(&USARTC1, &PORTC, PIN6_bm, PIN7_bm, PIN5_bm); 
+	tp_init(&tp2);
+	
+	tp3 = tp_new(&USARTD0, &PORTD, PIN2_bm, PIN3_bm, PIN4_bm);
+	tp_init(&tp3);
+	
+	tp4 = tp_new(&USARTD1, &PORTD, PIN6_bm, PIN7_bm, PIN5_bm);
+	tp_init(&tp4);
+	
+	PORTD.DIRCLR = PIN1_bm;
+	PORTD.DIRCLR = PIN0_bm; // button ready
+	PORTD.PIN1CTRL = PORT_OPC_PULLUP_gc;
+	PORTD.PIN0CTRL = PORT_OPC_PULLUP_gc;
+			
+	// system interrupt setup (allow low level interrupts)
+	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
+	
+	// globally enable interrupts 
+	sei();
+	
+	tpacket1[0] = 126; // start delimiter
+	tpacket1[1] = 1; // destination address (this and lower)
+	tpacket1[2] = 2; // # edges from source
+	tpacket1[3] = 4; // source address
+	tpacket1[4] = 64; // # of bytes in payload
+	tpacket1[69] = 126;
+	
+	tpacket2[0] = 126; // start delimiter
+	tpacket2[6] = 126; // end delimiter
+	
+	uint8_t data;
+	
+	while(1){
+		tp_statflash(&tp1);
+		if(tp2.pstate == TP_PSTATE_HASPACKET){
+			tp_stathi(&tp3);
+			PORTC.OUTSET = PIN3_bm;
+			
+			tp_write(&tp4, 126);
+			while(tp_read(&tp2, &data)){
+				tp_write(&tp4, data);
+			}
+			tp_write(&tp4, 126);
+			
+			PORTC.OUTCLR = PIN3_bm;
+			tp_statlo(&tp3);
+			tp2.pstate = TP_PSTATE_OUTSIDE;
+		} else if (!(PORTD.IN & PIN1_bm)){
+			tp_stathi(&tp3);
+			testpacket1(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500); // basically, debounce button
+		} else if (!(PORTD.IN & PIN0_bm)) {
+			tp_stathi(&tp3);
+			testpacket2(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500);
+		}
+		
+		// the below only works when bounded by nointerrupts() and interrupts();
+	}
+}
+
+/*
+turns off global interrupt control
+my understanding is that interrupts still get scheduled, but not executed
+when interrupts are turned back on, they fire.
+*/
+void nointerrupts(){
+	PMIC.CTRL |= ~PMIC_LOLVLEN_bm | ~PMIC_MEDLVLEN_bm | ~PMIC_HILVLEN_bm;
+}
+
+/*
+turns on global interrupt control
+*/
+void interrupts(){
+	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
+}
+
+// hookup ISRs to port-abstracted interrupt functions
+
+ISR(USARTC0_RXC_vect){
+	tp_rxISR(&tp1);
+}
+
+
+ISR(USARTC1_RXC_vect){
+	tp_rxISR(&tp2);
+}
+
+ISR(USARTD0_RXC_vect){
+	tp_rxISR(&tp3);
+}
+
+ISR(USARTD1_RXC_vect){
+	tp_rxISR(&tp4);
+}
+
+
+/*
+ISR(USARTC1_DRE_vect){
+	tp_txISR(&tp2);
+}
+
+ISR(USARTC0_DRE_vect){
+	tp_txISR(&tp1);
+}
+
+ISR(USARTD0_DRE_vect){
+	tp_txISR(&tp3);
+}
+
+ISR(USARTD1_DRE_vect){
+	tp_txISR(&tp4);
+}
+*/
\ No newline at end of file
diff --git a/results/daisychain/src/ringbuffer.c b/results/daisychain/src/ringbuffer.c
new file mode 100644
index 0000000000000000000000000000000000000000..effb7330aa7750503cfb798dce39d06cdc514dc1
--- /dev/null
+++ b/results/daisychain/src/ringbuffer.c
@@ -0,0 +1,52 @@
+#include "ringbuffer.h"
+#include <stdlib.h>
+#include <avr/io.h>
+
+uint8_t rb_init(ringbuffer_t *rb, size_t size){
+	rb->size = size;
+	rb->buffer = malloc(rb->size);
+	rb_reset(rb);
+	return 1;
+}
+
+uint8_t rb_reset(ringbuffer_t *rb){
+	if(rb){
+		rb->head = 0;
+		rb->tail = 0;
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+
+uint8_t rb_put(ringbuffer_t *rb, uint8_t data){
+	if(rb){
+		rb->buffer[rb->head] = data;
+		rb->head = (rb->head + 1) % rb->size; // for wrap around
+		if(rb->head == rb->tail){
+			rb->tail = (rb->tail + 1) % rb->size;
+		}
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+uint8_t rb_get(ringbuffer_t *rb, uint8_t *data){
+	if(rb && data && !rb_empty(*rb)){
+		*data = rb->buffer[rb->tail];
+		rb->tail = (rb->tail + 1) % rb->size;
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+uint8_t rb_empty(ringbuffer_t rb){
+	return (rb.head == rb.tail);
+}
+
+uint8_t rb_full(ringbuffer_t rb){
+	return ((rb.head + 1) % rb.size) == rb.tail;
+}
\ No newline at end of file
diff --git a/results/daisychain/src/ringbuffer.h b/results/daisychain/src/ringbuffer.h
new file mode 100644
index 0000000000000000000000000000000000000000..d6d2a8f00b2dcd121154a00e9881e75b81685161
--- /dev/null
+++ b/results/daisychain/src/ringbuffer.h
@@ -0,0 +1,38 @@
+#ifndef RINGBUFFER_H
+#define RINGBUFFER_H
+
+/*
+a ringbuffer,
+s/o https://github.com/dhess/c-ringbuf
+s/o https://embeddedartistry.com/blog/2017/4/6/circular-buffers-in-cc
+*/
+
+#include <avr/io.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+typedef struct {
+	uint8_t * buffer;
+	size_t head;
+	size_t tail; 
+	size_t size;
+} ringbuffer_t;
+
+uint8_t rb_init(ringbuffer_t *rb, size_t size);
+
+// sets tail to head
+uint8_t rb_reset(ringbuffer_t *rb);
+
+// writes one byte to next slot
+uint8_t rb_put(ringbuffer_t *rb, uint8_t data);
+
+// reads one byte from buffer
+uint8_t rb_get(ringbuffer_t *rb, uint8_t *data);
+
+uint8_t rb_empty(ringbuffer_t rb);
+
+uint8_t rb_full(ringbuffer_t rb);
+
+#endif
\ No newline at end of file
diff --git a/results/daisychain/src/tinyport.c b/results/daisychain/src/tinyport.c
new file mode 100644
index 0000000000000000000000000000000000000000..e39961aa012b2f838698478a003b1151d7f0e559
--- /dev/null
+++ b/results/daisychain/src/tinyport.c
@@ -0,0 +1,147 @@
+/*
+ * tinyport.c
+ *
+ * Created: 10/23/2017 11:40:37 AM
+ *  Author: Jake
+ */ 
+
+#include "tinyport.h"
+#include <util/delay.h>
+
+tinyport_t tp_new(USART_t *uart, PORT_t *port, uint8_t pinRX_bm, uint8_t pinTX_bm, uint8_t pinSTAT_bm){
+	
+	tinyport_t tp;
+	
+	tp.uart = uart;
+	tp.port = port;
+	
+	tp.pinRX_bm = pinRX_bm;
+	tp.pinTX_bm = pinTX_bm;
+	tp.pinSTAT_bm = pinSTAT_bm;
+	
+	tp.txstate = TP_TX_STATE_EMPTY;
+	tp.rxstate = TP_RX_STATE_EMPTY;
+	tp.pstate = TP_PSTATE_OUTSIDE;
+	
+	rb_init(&tp.rbrx, TP_RXBUF_SIZE);
+	rb_init(&tp.rbtx, TP_TXBUF_SIZE);
+	
+	return tp;
+}
+
+// mostly, start the uart port
+void tp_init(tinyport_t *tp){
+	// USART is in UART (async) mode automatically
+	// these registers setup the baudrate - the bitrate
+	// this seems a bit tricky. I am taking for granted that the clock is at 48MHz,
+	tp->uart->BAUDCTRLA = TP_UART_BAUDCONTROLA;
+	tp->uart->BAUDCTRLB = TP_UART_BAUDCONTROLB;
+	
+	// setup for interrupt
+	// receive complete interrupt low level, transmit complete interupt off, transmit buffer empty interupt off
+	tp->uart->CTRLA |= USART_RXCINTLVL_LO_gc | USART_TXCINTLVL_OFF_gc | USART_DREINTLVL_OFF_gc;
+
+	// enables tx and rx
+	tp->uart->CTRLB = USART_TXEN_bm | USART_RXEN_bm;
+	
+	// setup mode
+	tp->uart->CTRLC = USART_CMODE_ASYNCHRONOUS_gc | USART_PMODE_DISABLED_gc | USART_CHSIZE_8BIT_gc; // 8 bit word, async, no parity bit}
+	
+	// some GPIO setup, to agree with the UART peripheral
+	// tx pin (pin mapping is in the 'Datasheet', registers etc are in the 'Manual') these are default pins
+	tp->port->OUTSET = tp->pinTX_bm;
+	tp->port->DIRSET = tp->pinTX_bm;
+	// rx pin
+	tp->port->DIRCLR = tp->pinRX_bm;
+	tp->port->OUTCLR = tp->pinRX_bm;
+	// stat pin
+	tp->port->DIRSET = tp->pinSTAT_bm;
+}
+
+void tp_rxISR(tinyport_t *tp){ // towards a passalong
+	tp_statflash(tp);
+	
+	tp->bumpdata = tp->uart->DATA;
+	
+	switch (tp->pstate){
+		case TP_PSTATE_OUTSIDE:
+			if(tp->bumpdata == 126){
+				tp->pstate = TP_PSTATE_INSIDE;
+			}
+			break;
+		case TP_PSTATE_INSIDE:
+			if(tp->bumpdata == 126){
+				tp->pstate = TP_PSTATE_HASPACKET;
+			} else {
+				rb_put(&tp->rbrx, tp->bumpdata);
+			}
+			break;
+		default:
+			break;	
+	}
+}
+
+uint8_t tp_read(tinyport_t *tp, uint8_t *data){ // TODO: set at pointer, return true if non empty
+	if(rb_get(&tp->rbrx, data)){
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+// https://lost-contact.mit.edu/afs/sur5r.net/service/drivers+doc/Atmel/ATXMEGA/AVR1307/code/doxygen/usart__driver_8c.html#7fdb922f6b858bef8515e23229efd970
+
+void tp_write(tinyport_t *tp, uint8_t data){
+	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (needs work a better way)
+	tp->uart->DATA = data;
+}
+
+void tp_statflash(tinyport_t *tp){
+	tp->port->OUTTGL = tp->pinSTAT_bm;
+}
+
+void tp_stathi(tinyport_t *tp){
+	tp->port->OUTSET = tp->pinSTAT_bm;
+}
+
+void tp_statlo(tinyport_t *tp){
+	tp->port->OUTCLR = tp->pinSTAT_bm;
+}
+
+void tp_test(tinyport_t *tp){ // barebones write
+	tp_stathi(tp);
+	while(!(tp->uart->STATUS & USART_DREIF_bm));
+	tp->uart->DATA = 0xFF;
+	tp->uart->DATA = 0x0A;
+	tp_statlo(tp);
+}
+
+/*
+
+old code, for handling tx'ing with interrupts - we want more determinism on sends, so do straightforward
+
+void tp_txISR(tinyport_t *tp){
+	tp_statflash(tp);
+	rb_put(&tp->rbtx, tp->uart->DATA);
+	if(rb_empty(tp->rbtx)){  // if no data left to tx,
+		tp_setTxStatus(tp, TP_TX_STATE_EMPTY);
+	}
+}
+
+void tp_write(tinyport_t *tp, uint8_t data){
+	rb_put(&tp->rbtx, data);
+	tp_setTxStatus(tp, TP_TX_STATE_TRANSMIT); // available
+}
+
+void tp_setTxStatus(tinyport_t *tp, uint8_t state){
+	if(state == tp->txstate){ // if already set,
+		// do nothing
+	} else if(state) { // if set to hi - have things to tx
+		tp->uart->CTRLA |= USART_DREINTLVL_LO_gc; // now ready for out transmit - this would happen elsewhere - when there is tx to tx
+		tp->txstate = state;
+	} else { // if lo - buffer is empty, donot tx
+		tp->uart->CTRLA = (tp->uart->CTRLA & ~ USART_DREINTLVL_gm) | USART_DREINTLVL_OFF_gc; // turn off interrupt
+		tp->txstate = state;
+	}
+}
+*/
\ No newline at end of file
diff --git a/results/daisychain/src/tinyport.h b/results/daisychain/src/tinyport.h
new file mode 100644
index 0000000000000000000000000000000000000000..e4fedc8938510b00387bceaea23f64447c046c69
--- /dev/null
+++ b/results/daisychain/src/tinyport.h
@@ -0,0 +1,70 @@
+/*
+ * tinyport.h
+ *
+ * Created: 10/23/2017 11:40:51 AM
+ *  Author: Jake
+ */ 
+
+
+#ifndef TINYPORT_H_
+#define TINYPORT_H_
+
+#include "ringbuffer.h"
+
+#define TP_TXBUF_SIZE 128
+#define TP_RXBUF_SIZE 128
+#define TP_UART_BAUDCONTROLB 0
+#define TP_UART_BAUDCONTROLA 2 // 19200: 155, 115200: 25, 230400: 12, 428600: 6, 1M: 2, 1.5M: 1, 3M: 0
+
+#define TP_RX_STATE_EMPTY 0
+#define TP_RX_STATE_HASDATA 1
+
+#define TP_TX_STATE_EMPTY 0
+#define TP_TX_STATE_TRANSMIT 1
+
+#define TP_PSTATE_OUTSIDE 0
+#define TP_PSTATE_INSIDE 1
+#define TP_PSTATE_HASPACKET 2 
+
+typedef struct {
+	USART_t *uart;
+	PORT_t *port;
+	
+	uint8_t pinRX_bm;
+	uint8_t pinTX_bm;
+	uint8_t pinSTAT_bm;
+	
+	uint8_t txstate;
+	uint8_t rxstate;
+	uint8_t pstate;
+	
+	uint8_t bumpdata;
+	
+	ringbuffer_t rbrx;
+	ringbuffer_t rbtx;
+	
+} tinyport_t;
+
+tinyport_t tp_new(USART_t *uart, PORT_t *port, uint8_t pinRX_bm, uint8_t pinTX_bm, uint8_t pinSTAT_bm);
+
+void tp_init(tinyport_t *tp);
+
+void tp_statflash(tinyport_t *tp);
+void tp_statlo(tinyport_t *tp);
+void tp_stathi(tinyport_t *tp);
+void tp_test(tinyport_t *tp);
+
+void tp_rxISR(tinyport_t *tp);
+uint8_t tp_read(tinyport_t *tp, uint8_t *data);
+void tp_setRxStatus(tinyport_t *tp, uint8_t state);
+
+void tp_write(tinyport_t *tp, uint8_t data);
+
+
+void tp_txISR(tinyport_t *tp);
+/*
+void tp_write(tinyport_t *tp, uint8_t data);
+void tp_setTxStatus(tinyport_t *tp, uint8_t state);
+*/
+
+#endif /* TINYPORT_H_ */
\ No newline at end of file