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openocd_nrf52_patch
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Sam Calisch
openocd_nrf52_patch
Commits
01c0ffe9
Commit
01c0ffe9
authored
Jun 6, 2011
by
Laurent Charpentier
Committed by
Øyvind Harboe
Jun 8, 2011
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Added configuration file for stm32f2xxx.
parent
33f9bec9
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tcl/target/stm32f2xxx.cfg
+56
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tcl/target/stm32f2xxx.cfg
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tcl/target/stm32f2xxx.cfg
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01c0ffe9
# script for stm32f2xxx
if
{
[info exists CHIPNAME]
}
{
set
_CHIPNAME
$CHIPNAME
}
else
{
set
_CHIPNAME
stm32f2xxx
}
if
{
[info exists ENDIAN]
}
{
set
_ENDIAN
$ENDIAN
}
else
{
set
_ENDIAN
little
}
# Work-area is a space in RAM used for flash programming
# By default use 64kB
if
{
[info exists WORKAREASIZE]
}
{
set
_WORKAREASIZE
$WORKAREASIZE
}
else
{
set
_WORKAREASIZE
0x10000
}
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
jtag_khz
1000
jtag_nsrst_delay
100
jtag_ntrst_delay
100
#jtag scan chain
if
{
[info exists CPUTAPID ]
}
{
set
_CPUTAPID
$CPUTAPID
}
else
{
# See STM Document RM0033
# Section 32.6.3 - corresponds to Cortex-M3 r2p0
set
_CPUTAPID
0x4ba00477
}
jtag
newtap
$_CHIPNAME
cpu
-irlen
4
-ircapture
0x1
-irmask
0xf
-expected-id
$_CPUTAPID
if
{
[info exists BSTAPID ]
}
{
set
_BSTAPID
$BSTAPID
}
else
{
# See STM Document RM0033
# Section 32.6.2
#
set
_BSTAPID
0x06411041
}
jtag
newtap
$_CHIPNAME
bs
-irlen
5
-expected-id
$_BSTAPID
set
_TARGETNAME
$_CHIPNAME.cpu
target
create
$_TARGETNAME
cortex_m3
-endian
$_ENDIAN
-chain-position
$_TARGETNAME
$_TARGETNAME
configure
-work-area-phys
0x20000000
-work-area-size
$_WORKAREASIZE
-work-area-backup
0
set
_FLASHNAME
$_CHIPNAME.flash
flash
bank
$_FLASHNAME
stm32f2xxx
0
0
0
0
$_TARGETNAME
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