the motor spins

circuit/README.md

@@ -153,8 +153,13 @@ I sped this up some and it looks more like a chopped sinusoid - this means I sho
 That's it for now.
 
 ## Incremental Notes
+ - non-incrementally, do this as an endpoint, not a switch. try ATSAMD21. do 2oz copper layer.
  - 2.2uF @ 100v -> 1206 smallest available package. Can replace with 1uF or up package. 
  - Would via to heat-pad underneath fets, next time. could also go to 2oz copper but have to push out to 0.2mm spacing.
+ - if new chip who dis, do thermistor at gates
+ - do VBUS voltage divider as well
+ - do 63V BFC
+ - get your gates into happy-heatsinking land! This is satisfying, awesome, and helpful. 
  - VCC Net could be happier - see pinch pts... in many places.
  - Tented Vias, or move away from FET
  - No Thermal Relief on Power In / Big Fet Pads

circuit/mkbldcdriver/eagle.epf

@@ -31,59 +31,12 @@ UsedLibrary="C:/EAGLE 8.3.2/lbr/ltspice/sym.lbr"
 UsedLibrary="D:/Dropbox (Personal)/CBA/doc/libraries_jake/eagle/marekr/borkedlabs-passives.lbr"
 
 [Win_1]
-Type="Library Editor"
-Loc="0 0 1919 1039"
-State=1
-Number=3
-File="D:/Dropbox (Personal)/CBA/doc/libraries/eagle/fab.lbr"
-View="-7.66064 -6.89186 7.66064 12.4799"
-WireWidths=" 0.0762 0.1016 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524 0.127"
-PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
-PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
-ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0"
-ViaDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
-HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35"
-TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778 1.27"
-PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27"
-PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
-MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0"
-DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13"
-DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
-DimensionExtLengths=" 1.27 2.54 1 2 3 0"
-DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
-SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
-WireBend=0
-WireBendSet=0
-WireCap=1
-MiterStyle=0
-PadShape=0
-ViaShape=1
-PolygonPour=0
-PolygonRank=0
-PolygonThermals=1
-PolygonOrphans=0
-TextRatio=8
-DimensionUnit=1
-DimensionPrecision=2
-DimensionShowUnit=0
-PinDirection=3
-PinFunction=0
-PinLength=2
-PinVisible=3
-SwapLevel=0
-ArcDirection=0
-AddLevel=2
-PadsSameType=0
-Layer=51
-Package="WSL2726"
-
-[Win_2]
 Type="Schematic Editor"
 Loc="0 0 1919 1039"
 State=1
 Number=2
 File="mkbldcdriver.sch"
-View="-32.2247 -18.1454 230.838 72.6828"
+View="-58.2901 -16.7748 204.773 74.0534"
 WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524"
 PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
 PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
@@ -122,16 +75,16 @@ ArcDirection=0
 AddLevel=2
 PadsSameType=0
 Layer=91
-Views=" 1: -32.2247 -18.1454 230.838 72.6828"
+Views=" 1: -58.2901 -16.7748 204.773 74.0534"
 Sheet="1"
 
-[Win_3]
+[Win_2]
 Type="Board Editor"
 Loc="0 0 1919 1039"
 State=1
 Number=1
 File="mkbldcdriver.brd"
-View="11.4047 14.678 72.5534 53.5328"
+View="-29.9487 -10.7101 122.209 85.973"
 WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524"
 PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
 PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6"
@@ -171,7 +124,7 @@ AddLevel=2
 PadsSameType=0
 Layer=1
 
-[Win_4]
+[Win_3]
 Type="Control Panel"
 Loc="0 0 1919 1039"
 State=1
@@ -182,4 +135,3 @@ Screen="3840 2160"
 Window="Win_1"
 Window="Win_2"
 Window="Win_3"
-Window="Win_4"

embedded/atsams70-bldc/atsams70-bldc/src/main.c

@@ -140,14 +140,42 @@ void setupuart(void){
 	PIOA->PIO_ABCDSR[1] |= PIO_PER_P4;
 }
 
+uint8_t d1;
+uint8_t d2;
+int32_t dstate = 0;
+uint32_t mready = 0;
+
+uint8_t pchar = 'p';
+uint8_t tchar = 't';
+
 void UART1_Handler(){
 	if(UART1->UART_SR & UART_SR_RXRDY){
-		uint8_t data = UART1->UART_RHR;
-		while(!(UART1->UART_SR & UART_SR_TXRDY));
-		UART1->UART_THR = data;
+		if(dstate){
+			d2 = UART1->UART_RHR;
+			dstate = 0;
+			mready = 1;
+		} else {
+			d1 = UART1->UART_RHR;
+			dstate = 1;
+		}
 	} else {
-		//
+		// bail
+	}
 }
+
+void uarthello(void){
+	tp_putchar(&tp3, 'h');
+	delay_ms(1);
+	tp_putchar(&tp3, 'e');
+	delay_ms(1);
+	tp_putchar(&tp3, 'l');
+	delay_ms(1);
+	tp_putchar(&tp3, 'l');
+	delay_ms(1);
+	tp_putchar(&tp3, 'o');
+	delay_ms(1);
+	tp_putchar(&tp3, 0x0A);
+	delay_ms(1);
 }
 
 int main (void)
@@ -190,6 +218,18 @@ int main (void)
 	pin_set(&enablepin); // boot the gates
 	
 	while(1){
+		if(mready){
+			if(d1 == pchar){
+				period = min(d2, 5); // minimum delay is 50us, 20 000 electrical rpms, very fast 
+			}
+			if(d1 == tchar){
+				scalar = max(d2, 64); // max. scalar power is 64 / 255 - trying to avoid burning the controller!
+			}
+			tp_putchar(&tp3, d1);
+			tp_putchar(&tp3, d2);
+			mready = 0;
+		}
+
 		// to update, must use duty update register, not just 'duty' 
 		phaseu ++;
 		phasev ++;
@@ -215,8 +255,5 @@ int main (void)
 		} else {
 			pin_set(&stlr);
 		}
-		
-		//tp_putchar(&tp3, 35); // http://www.asciitable.com/
 	}
-	/* Insert application code here, after the board has been initialized. */
 }

embedded/atsams70-bldc/atsams70-bldc/src/tinyport.c

@@ -65,7 +65,7 @@ void tp_init(tinyport_t *tp){
 	// baud rate clock is the peripheral clock / (16 * clock divisor)
 	// clock divisor is written in the UART_BRGR register
 	// at the moment, 9600
-	tp->uart->UART_MR = UART_MR_BRSRCCK_PERIPH_CLK | UART_MR_CHMODE_NORMAL;
+	tp->uart->UART_MR = UART_MR_BRSRCCK_PERIPH_CLK | UART_MR_CHMODE_NORMAL | UART_MR_PAR_NO | UART_MR_FILTER_DISABLED;
 	tp->uart->UART_BRGR = 977;
 	tp->uart->UART_CR = UART_CR_TXEN | UART_CR_RXEN;