Add FPGA communication ring test results

GPIO/iCE40/README.md

-# iCE40 Ring Test
+# iCE40 Ring Oscillator Test
 
 ## Dependencies
 

comm/iCE40/README.md

+# iCE40 Communication Ring Test
+
+## Dependencies
+
+- [IceStorm tools](https://github.com/YosysHQ/icestorm)
+- [yosys](http://www.clifford.at/yosys/download.html)
+- [nextpnr](https://github.com/YosysHQ/nextpnr)
+
+Install instructions for all of the above tools can be found on the [IceStorm
+website](http://bygone.clairexen.net/icestorm/).
+
+## Building
+
+The default `make` target synthesizes the design and runs a timing analysis. The target `prog`
+programs an available iCEBreaker via USB.
+
+## Running
+
+I used two iCEBreaker boards. Each board's P1A1 is connected to the other's P1A2. (If you connect
+the two P1A1 pins together, the drivers will fight each other until one burns out.) I monitored P1A4
+on one of the boards with an oscilloscope. By triggering on this signal, I can time how long it
+takes to send 256 packets round trip. (The result of the test is thus the frequency the oscilloscope
+reports times 256.)
+
+## Results
+
+The fastest I can clock the FPGA while passing `icetime`'s analysis is 39.75MHz. This lets us use a
+baud rate of nearly 5Mbit (we want to use 8x oversampling when receiving data since the two FPGAs
+clocks aren't synchronized). At this speed, we see groups of 256 round trips happening at a rate of
+978Hz. So overall this means the individual round trip frequency is 250kHz.
+
+![64.5MHz](./img/comm_ring_40mhz.png)
+
+Out of curiosity, I tried running at 48MHz as well and it seemed to work. At 60MHz however it
+quickly drops a byte. So here it seems prudent to stay within `icetime`'s limits.

index.html

@@ -203,6 +203,14 @@ The communication test measures how quickly two nodes can exchange messages; thi
 <th>date</th>
 </tr>
 
+<tr>
+<td>0.250</td>
+<td><a href=comm/iCE40/ring.v>iCE40, Verilog</a> (<a href=comm/iCE40/README.md>notes</a>)</td>
+<td>two 22 gauge jumpers (tx/rx)</td>
+<td><a href=comm/iCE40/ring.v>iCE40, Verilog</a></td>
+<td>September 2021</td>
+</tr>
+
 <tr>
 <td>0.010</td>
 <td><a href=comm/termios/ring.termios.c>i7-8700T, C, termios</a></td>